Patent classifications
H10H20/823
Laterally varying II-VI alloys and uses thereof
Described herein are semiconductor structures comprising laterally varying II-VI alloy layer formed over a surface of a substrate. Further, methods are provided for preparing laterally varying II-VI alloy layers over at least a portion of a surface of a substrate comprising contacting at least a portion of a surface of a substrate within a reaction zone with a chemical vapor under suitable reaction conditions to form a laterally varying II-VI alloy layer over the portion of the surface of the substrate, wherein the chemical vapor is generated by heating at least two II-VI binary compounds; and the reaction zone has a temperature gradient of at least 50-100 C. along an extent of the reaction zone. Also described here are devices such as lasers, light emitting diodes, detectors, or solar cells that can use such semiconductor structures. In the case of lasers, spatially varying wavelength can be realized while in the case of solar cells and detectors multiple solar cells can be achieved laterally where each cell absorbs solar energy of a given wavelength range such that entire solar spectrum can be covered by the said solar cell structure. For LED applications, spatial variation of alloy composition can be used to engineer colors of light emission.
Crystalline multilayer structure and semiconductor device
Provided is a crystalline multilayer structure having good semiconductor properties. In particular, the crystalline multilayer structure has good electrical properties as follows: the controllability of conductivity is good; and vertical conduction is possible. A crystalline multilayer structure includes a metal layer containing a uniaxially oriented metal as a major component and a semiconductor layer disposed directly on the metal layer or with another layer therebetween and containing a crystalline oxide semiconductor as a major component. The crystalline oxide semiconductor contains one or more metals selected from gallium, indium, and aluminum and is uniaxially oriented.
Ultrawide bandgap semiconductor devices including magnesium germanium oxides
Various forms of Mg.sub.xGe.sub.1-xO.sub.2-x are disclosed, where the Mg.sub.xGe.sub.1-xO.sub.2-x are epitaxial layers formed on a substrate comprising a substantially single crystal substrate material. The epitaxial layer of Mg.sub.xGe.sub.1-xO.sub.2-x has a crystal symmetry compatible with the substrate material. Semiconductor structures and devices comprising the epitaxial layer of Mg.sub.xGe.sub.1-xO.sub.2-x are disclosed, along with methods of making the epitaxial layers and semiconductor structures and devices. Also disclosed is single crystal Mg.sub.xGe.sub.1-xO.sub.2-x, with x having a value of 0x<1. The single crystal Mg.sub.xGe.sub.1-xO.sub.2-x may comprise a dopant chosen from Ga, Al, Li.sup.+, N.sup.3+. The single crystal Mg.sub.xGe.sub.1-xO.sub.2-x may comprise a p-type conductivity.
Methods and material deposition systems for forming semiconductor layers
In embodiments, methods of configuring a molecular beam epitaxy system include providing a rotation mechanism configured to rotate a substrate deposition plane of a substrate around a center axis of the substrate deposition plane. A positioning mechanism is provided, being configured to allow the substrate deposition plane and an exit aperture of at least one material source in a plurality of material sources to be adjusted in position relative to each other between production runs. The at least one material source has a predetermined material ejection spatial distribution with a symmetry axis that intersects the substrate at a point offset from the center axis. A size of a reaction chamber, that houses the rotation mechanism and the plurality of material sources, is scaled based on the orthogonal distance and the lateral distance in relationship to a radius of the substrate.
LED CHIP BASED ON ALUMINA-SILICA COMPOSITE SUBSTRATE AND FABRICATION METHOD THEREOF
The present application provides an LED chip based on an alumina-silica composite substrate and a fabrication method thereof. The LED chip comprises an alumina-silica composite PSS substrate, a composite buffer layer and an LED structural layer, wherein the composite buffer layer is epitaxially grown on the alumina-silica composite PSS substrate, and the LED structural layer is epitaxially grown on the composite buffer layer. The composite buffer layer comprises: an aluminium oxynitride/aluminium nitride layer and a silicon oxynitride layer, wherein the alumina in the alumina-silica composite PSS substrate is covered with the aluminium oxynitride/aluminium nitride layer, and the silica in the alumina-silica composite PSS substrate is covered with the aluminium oxynitride/aluminium nitride layer and the silicon oxynitride layer in a staggered manner.
Gas phase enhancement of emission color quality in solid state LEDs
Light-emitting materials are made from a porous light-emitting semiconductor having quantum dots (QDs) disposed within the pores. According to some embodiments, the QDs have diameters that are essentially equal in size to the width of the pores. The QDs are formed in the pores by exposing the porous semiconductor to gaseous QD precursor compounds, which react within the pores to yield QDs. According to certain embodiments, the pore size limits the size of the QDs produced by the gas-phase reactions. The QDs absorb light emitted by the light-emitting semiconductor material and reemit light at a longer wavelength than the absorbed light, thereby down-converting light from the semiconductor material.
OPTOELECTRONIC DEVICE
An optoelectronic device comprises a semiconductor stack, a first metal layer arranged above the semiconductor stack and having a first major plane and a first boundary with a first gradually reduced thickness, and a second metal layer arranged above the first metal layer and having a second major plane and a second boundary with a second gradually reduced thickness, wherein the second major plane parallels to the first major plane and the second boundary exceeds the first boundary, wherein a first angle formed between the first boundary and the semiconductor stack, and/or a second angle formed between the second boundary and the semiconductor stack, is/are less than 10.
High efficiency LEDs and LED lamps
In various embodiments, lighting systems include an electrically insulating carrier having a plurality of conductive elements disposed thereon and a light-emitting array. The light-emitting array is disposed over the carrier and includes a plurality of light-emitting diodes (LEDs) that are interconnected in parallel in a first direction and interconnected in series in a second direction different from the first direction.
Manufacturing method of quantum dot light emitting diode
A quantum dot light emitting diode, including a first electrode and a second electrode, a quantum dot light emitting layer disposed between the two electrodes, including at least a red quantum dot, a green quantum dot and a blue quantum dot, and a black matrix at least disposed among the red quantum dot, the green quantum dot and the blue quantum dot; one of the first electrode and the second electrode that is located on a light exiting side is at least a transparent electrode. With the quantum dot light emitting diode, a full-color display can be realized, and the aperture ratio of pixels can be effectively enhanced. There are further disclosed a manufacturing method of the quantum dot light emitting diode and a display device.
Method for manufacturing light emitting device
A method for manufacturing a light emitting device has: preparing a base body which comprises a pair of connection terminals; preparing a light emitting element which includes a substrate, a semiconductor laminate that is laminated on the substrate, and a pair of electrodes formed on the surface of the semiconductor laminate; joining the electrodes of the light emitting element to the connection terminals of the base body; covering the light emitting element with a sealing member; and removing at least a part of the sealing member and a part of the substrate of the light emitting element from the opposite side from the base body so that an upper surface of the sealing member is lower than an upper surface of the substrate of the light emitting element.