Patent classifications
H10F77/30
Method for selecting an optical sensor
Described herein is an optical sensor, a detector for an optical detection including the optical sensor, a method for manufacturing the optical sensor and various uses of the optical detector. The optical sensor includes a stack.
Method for selecting an optical sensor
Described herein is an optical sensor, a detector for an optical detection including the optical sensor, a method for manufacturing the optical sensor and various uses of the optical detector. The optical sensor includes a stack.
Semiconductor device package
An embodiment provides a semiconductor device package, the semiconductor device package comprising: a substrate including an electrode disposed on one surface; a metal sidewall disposed on the substrate while surrounding the electrode; a semiconductor device disposed on the electrode; and a light transmitting member disposed on the metal sidewall to cover the semiconductor device, wherein the metal sidewall has the inner surface and the outer surface which are corrugated, and includes: a first metal part disposed on the substrate; a second metal part disposed on the first metal part; and a third metal part disposed on the second metal part, and the inner surface or the outer surface of the metal sidewall includes a recess portion between the second metal part and the third metal part.
All-black crystalline silicon solar cell and preparation method therefor, and photovoltaic module
Disclosed in the present invention are an all-black crystalline silicon solar cell and a preparation method therefor, and a photovoltaic module. The preparation method comprises the following steps: (1) depositing a film layer on the front face of a silicon wafer by means of a PECVD method so as to obtain a silicon wafer having a coated front face, wherein the film layer is of a laminated structure and comprises an innermost SiN.sub.x layer having a thickness of 20 nm or more; (2) subjecting the resulting silicon wafer having the coated front face to back-face PECVD and laser beam grooving so as to obtain a coarse silicon solar cell; and (3) subjecting the resulting coarse silicon solar cell to silk-screen printing and electron injection to then obtain an all-black crystalline silicon solar cell. In the preparation method provided in the present application, the film layer is deposited on the front face of the silicon wafer by means of the PECVD method, the material and thickness of the innermost SiNx layer are designed, and particularly when the thickness thereof is 20 nm or more, the absorption and reflection effects of incident light on the surface of the cell are influenced, such that the incident light is almost completely absorbed, and only an extremely small amount of the incident light is reflected; therefore, the all-black crystalline silicon solar cell is obtained.
Method of forming transparent layers for a solar cell
Disclosed herein are devices, systems, and methods for processing a solar cell precursor. The processing may include forming a transparent, electrically conductive first layer over the solar cell precursor. The processing may also include forming a transparent, electrically conductive second layer over the solar cell precursor, preferably in physical contact with the first layer. The first layer may comprise at least indium, zinc, and oxygen and the second layer may comprise oxygen and a greater proportion of indium than the first layer.
Solar cell and method for manufacturing solar cell, and photovoltaic module
A solar cell, a method for manufacturing solar cell, and a photovoltaic module. The solar cell includes: a semiconductor substrate; a tunneling layer located over a rear surface of the semiconductor substrate; a hydrogen barrier layer located over a surface of the tunneling layer; a lightly doped conductive layer located over a surface of the hydrogen barrier layer; and grid-shaped doped conductive layers located on at least part of a surface of the lightly doped conductive layer, wherein each of the grid-shaped doped conductive layers includes a heavily doped conductive layer and a metal barrier layer that are stacked on one another.
Solar cell, method for preparing same and solar cell module
A solar cell includes a substrate having a front surface and a back surface opposite to the front surface; a first passivation layer, a second passivation layer and a third passivation layer sequentially formed on the front surface of the substrate and in a direction away from the substrate; where the first passivation layer includes a dielectric material; the second passivation layer includes a first Si.sub.uN.sub.v material, and a value of v/u is 1.3v/u1.7; and the third passivation layer includes a Si.sub.rO.sub.s material, and a value of s/r is 1.9s/r3.2; and a tunneling oxide layer and a doped conductive layer sequentially formed on the back surface of the substrate and in a direction away from the back surface; the doped conductive layer and the substrate are doped to have a same conductivity type.
SOLAR CELL AND MANUFACTURING METHOD THEREFOR
The disclosure discloses a solar cell and a preparation method for a solar cell. The preparation method for a solar cell comprises: sequentially forming a tunnel silicon oxide layer, an N-type doped polysilicon layer, and a front metal layer in an entire fashion on a front surface of a P-type silicon substrate; subjecting the entire front metal layer to a photoetching process to form a patterned front fine gate electrode; subjecting the tunnel silicon oxide layer and the N-type doped polysilicon layer in a region not covered by the front fine gate electrode to chemical etching to form a local tunnel silicon oxide layer and a local N-type doped polysilicon layer, wherein the widths of the local tunnel silicon oxide layer and the local N-type doped polysilicon layer are the same as the width of the front fine gate electrode. The preparation method may achieve an automatic and precise alignment of the front fine gate electrode with a local tunnel oxide passivated layer and a local polysilicon layer, thereby effectively reducing a difficulty in a preparation process of a local passivated contact emitter while ensuring the efficiency of the solar cell.
LIGHT RECEIVING ELEMENT
A light receiving element includes a first semiconductor layer having a first conductivity type, a light absorbing layer stacked above the first semiconductor layer, a second semiconductor layer stacked above the light absorbing layer and having a second conductivity type, a first electrode electrically connected to the first semiconductor layer, a second electrode electrically connected to the second semiconductor layer, a first insulating film, and a light shielding film provided on or above the first insulating film. A light receiving region is formed at a portion overlapping the light absorbing layer, the first insulating film is configured to cover a periphery of the light receiving region, and the light shielding film is configured to cover the periphery of the light receiving region and has a light transmittance lower than a light transmittance of the first insulating film.
HIGH-SENSITIVITY AVALANCHE PHOTODETECTORS WITH FEEDBACK STRUCTURES
A method for the fabrication of avalanche photodiodes (APDs) useful as high-sensitivity Geiger-mode APDs. The photodetector is formed on a semiconductor substrate of indium phosphide (InP) having epitaxial layers, including indium gallium arsenide (InGaAs) as the photodetecting layer, with n-doped InP to one side, and layers of InP incorporating p-doped regions on the opposite side. The p-doped regions serve to define an array of micro-cells, which may have a hexagonal configuration. A well may be etched through the epitaxial structures, allowing one electrode to contact the n-doped InP layer and another electrode to contact the p-doped InP regions, with both electrodes on the same side of the detector. Bonding techniques then attach the semiconductor wafer to a support substrate, which may additionally be configured with electronic circuitry positioned to electrically contact the electrodes on the semiconductor wafer surface, and diced to form individual devices.