Systems and methods for fabricating a photovoltaic structure are provided. During fabrication, a patterned mask is formed on a first surface of a multilayer body of the photovoltaic structure, with openings of the mask corresponding to grid line locations of a first grid. Subsequently, a core layer of the first grid is deposited in the openings of the patterned mask, and a protective layer is deposited on an exposed surface of the core layer. The patterned mask is then removed to expose the sidewalls of the core layer. Heat is applied to the protective layer such that the protective layer reflows to cover both the exposed surface and sidewalls of the core layer.

A photovoltaic device includes a substrate structure and a p-type semiconductor absorber layer, the substrate structure including a CdSSe layer. A photovoltaic device may alternatively include a CdSeTe layer. A process for manufacturing a photovoltaic device includes forming a CdSSe layer over a substrate by at least one of sputtering, evaporation deposition, CVD, chemical bath deposition process, and vapor transport deposition process. The process includes forming a p-type absorber layer above the CdSSe layer.

A method of manufacturing a solar cell is discussed. The method of manufacturing the solar cell includes: forming a conductive region on a semiconductor substrate; forming an electrode connected to the conductive region; and post-processing the semiconductor substrate to passivate the semiconductor substrate. The post-processing of the semiconductor substrate comprises a main processing process for heat-treating the semiconductor substrate while providing light to the semiconductor substrate. A temperature of the main processing process is about 100 C. to about 800 C., and the temperature and light intensity of the main processing process satisfy Equation of 175031.8.Math.T+(0.16).Math.T.sup.2I. Here, T is the temperate ( C.) of the main processing process, and I is the light intensity (mW/cm.sup.2) of the main processing process.

An integration method of fabricating optical sensor device and thin film transistor device includes the follow steps. A substrate is provided, and a gate electrode and a bottom electrode are formed on the substrate. A first insulating layer is formed on the gate electrode and the bottom electrode, and the first insulating layer at least partially exposes the bottom electrode. An optical sensing pattern is formed on the bottom electrode. A patterned transparent semiconductor layer is formed on the first insulating layer, wherein the patterned transparent semiconductor layer includes a first transparent semiconductor pattern covering the gate electrode, and a second transparent semiconductor pattern covering the optical sensing pattern. A source electrode and a drain electrode are formed on the first transparent semiconductor pattern. A modification process including introducing at least one gas is performed on the second transparent semiconductor pattern to transfer the second transparent semiconductor pattern into a conductive transparent top electrode.

The invention provides an electroconductive paste comprising metallic particles, an inorganic reaction system, and an organic vehicle. The inorganic reaction system includes a lead-tellurium-magnesium composition of Formula (II): Pb.sub.aTe.sub.b(Mg.sub.wCa.sub.xSr.sub.yBa.sub.z)-M.sub.d-Oe, wherein 0<a, b, or d1, 0w, x, y, z1, w+x+y+z=c, at least one of w, x, y and z is greater than zero, the sum of a, b, c and d is 1, 0<c0.2, 0d0.5, a:b is between about 10:90 and about 90:10, (a+c+d):b is between about 10:90 and about 90:10, M is one or more elements, and e is a number sufficient to balance the Pb, Te, MgCaSrBa and M components.

The invention provides an electroconductive paste comprising metallic particles, an inorganic reaction system, and an organic vehicle. The inorganic reaction system comprises a lead-tellurium-magnesium-zinc composition of Formula (III): Pb.sub.aTe.sub.b13 (Mg.sub.wCa.sub.xSr.sub.yBa.sub.z)Zn.sub.f-M.sub.d-O.sub.e, wherein 0<a, b, d, or f1, 0w, x, y, z1, w+x+y+z=c, at least one of w, x, y, and z is greater than zero, the sum of a, b, c, d and f is 1, 0<c0.2, 0<f0.2, 0d0.5, a:b is between about 10:90 and about 90:10, (a+c+f+d):b is between about 10:90 and about 90:10, M is one or more elements, and e is a number sufficient to balance the Pb, Te, MgCaSrBa, Zn, and M components.

Disclosed is an avalanche photodiode using a silicon nanowire, including a first silicon nanowire formed of silicon (Si), a first conductive region formed by doping one surface of the first silicon nanowire with a first dopant, and a second conductive region formed by doping one surface of the first silicon nanowire with a second dopant having a conductive type different from that of the first dopant so as to be arranged continuously in a longitudinal direction from the first conductive region, wherein, when the magnitude of a reverse voltage applied to both ends of the first silicon nanowire is equal to or greater than a preset breakdown voltage, avalanche multiplication of inner current occurs due to the incidence of light from the outside.

An impurity-diffusing composition including (A) a polysiloxane represented by Formula (1) and (B) an impurity diffusion component. ##STR00001## In the formula, R.sup.1 represents an aryl group having 6 to 15 carbon atoms, and a plurality of R.sup.1 may be the same or different. R.sup.2 represents any of a hydroxyl group, an alkyl group having 1 to 6 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkenyl group having 2 to 10 carbon atoms, an acyl group having 2 to 6 carbon atoms, and an aryl group having 6 to 15 carbon atoms, and a plurality of R.sup.2 may be the same or different. R.sup.3 and R.sup.4 each represent any of a hydroxyl group, an alkyl group having 1 to 6 carbon atoms, an alkoxy group having 1 to 6 carbon atoms, an alkenyl group having 2 to 10 carbon atoms, and an acyl group having 2 to 6 carbon atoms, and a plurality of R.sup.3 and a plurality of R.sup.4 each may be the same or different. The ratio of n:m is 95:5 to 25:75.

An optical semiconductor device comprises, on a substrate, a fin of diamond-cubic semiconductor material and, at the base of the fin, a slab of that semiconductor material, in a diamond-hexagonal structure, that extends over the full width of the fin, the slab being configured as an optically active material. This semiconductor material can contain silicon. A method for manufacturing the optical semiconductor device comprises annealing the sidewalls of the fin, thereby inducing a stress gradient along the width of the fin.

Solar cell fabrication using laser patterning of ion-implanted etch-resistant layers, and the resulting solar cells, are described. In an example, a back contact solar cell includes an N-type single crystalline silicon substrate having a light-receiving surface and a back surface. Alternating continuous N-type emitter regions and segmented P-type emitter regions are disposed on the back surface of the N-type single crystalline silicon substrate, with gaps between segments of the segmented P-type emitter regions. Trenches are included in the N-type single crystalline silicon substrate between the alternating continuous N-type emitter regions and segmented P-type emitter regions and in locations of the gaps between segments of the segmented P-type emitter regions. An approximately Gaussian distribution of P-type dopants is included in the N-type single crystalline silicon substrate below the segmented P-type emitter regions. A maximum concentration of the approximately Gaussian distribution of P-type dopants is approximately in the center of each of the segmented P-type emitter regions between first and second sides of each of the segmented P-type emitter regions. Substantially vertical P/N junctions are included in the N-type single crystalline silicon substrate at the trenches formed in locations of the gaps between segments of the segmented P-type emitter regions.