A semiconductor structure includes a silicon substrate, a protection layer, an electrical pad, an isolation layer, a redistribution layer, a conductive layer, a passivation layer, and a conductive structure. The silicon substrate has a concave region, a step structure, a tooth structure, a first surface, and a second surface opposite to the first surface. The step structure and the tooth structure surround the concave region. The step structure has a first oblique surface, a third surface, and a second oblique surface facing the concave region and connected in sequence. The protection layer is located on the first surface of the silicon substrate. The electrical pad is located in the protection layer and exposed through the concave region. The isolation layer is located on the first and second oblique surfaces, the second and third surfaces of the step structure, and the tooth structure.

A photovoltaic structure can include two or more sets of parallel conductive fingers on a top surface and a bottom surface, such that the fingers can collect an electric current from the underlying photovoltaic structure. A scribing system can scribe a groove of a predetermined depth near and perpendicular to the plurality of fingers of the photovoltaic structure, and the photovoltaic structure can be cleaved along the groove to produce multiple strips that each can include a set of parallel fingers. An adhesive dispense system may deposit a band of conductive adhesive that can overlap a set of parallel fingers on each strip, and the strips may be overlapped over the conductive adhesive to form a string of cascaded strips. An adhesive-curing system can include an oven that may cure the conductive adhesive on one or more strips of the string at a time.

An optical semiconductor device comprises, on a substrate, a fin of diamond-cubic semiconductor material and, at the base of the fin, a slab of that semiconductor material, in a diamond-hexagonal structure, that extends over the full width of the fin, the slab being configured as an optically active material. This semiconductor material can contain silicon. A method for manufacturing the optical semiconductor device comprises annealing the sidewalls of the fin, thereby inducing a stress gradient along the width of the fin.

A photodetector cell includes a substrate having a semiconductor surface layer, and a trench in the semiconductor surface layer. The trench has tilted sidewalls including a first tilted sidewall and a second tilted sidewall. A pn junction, a PIN structure, or a phototransistor includes an active p-region and an active n-region that forms a junction including a first junction along the first tilted sidewall to provide a first photodetector element and a second junction spaced apart from the first junction along the second tilted sidewall to provide a second photodetector element. At least a p-type anode contact and at least an n-type cathode contact contacts the active p-region and active n-region of the first photodetector element and second photodetector element. The tilted sidewalls provide an outer exposed or optically transparent surface for passing incident light to the first and second photodetector elements for detection of incident light.

An n-type low-doped region and a first main-surface side highly doped region, which has an n-type dopant concentration higher than that in the n-type low-doped region, are provided in an n-type crystalline silicon substrate. The first main-surface side highly doped region is arranged between the n-type low-doped region and a p-type amorphous silicon layer.

A method of manufacturing a photoelectric conversion element including a semiconductor layer includes: forming an electrode; forming an insulating layer covering the electrode; forming an opening in a region of the insulating layer overlapping the electrode in a plan view; forming a covering layer of a semiconductor material on a surface of the insulating layer; and forming the semiconductor layer by patterning the covering layer. In the forming of the semiconductor layer, the semiconductor layer is formed such that an outer circumferential edge of the semiconductor layer is located on the outside of an inner circumferential edge of the opening in the plan view.

One embodiment of the invention can provide a system for fabricating a photovoltaic structure. During fabrication, the system can form a sacrificial layer on a first side of a Si substrate; load the Si substrate into a chemical vapor deposition tool, with the sacrificial layer in contact with a wafer carrier; and form a first doped Si layer on a second side of the Si substrate. The system subsequently can remove the sacrificial layer; load the Si substrate into a chemical vapor deposition tool, with the first doped Si layer facing a wafer carrier; and form a second doped Si layer on the first side of the Si substrate.

Solar cell fabrication using laser patterning of ion-implanted etch-resistant layers, and the resulting solar cells, are described. In an example, a back contact solar cell includes an N-type single crystalline silicon substrate having a light-receiving surface and a back surface. Alternating continuous N-type emitter regions and segmented P-type emitter regions are disposed on the back surface of the N-type single crystalline silicon substrate, with gaps between segments of the segmented P-type emitter regions. Trenches are included in the N-type single crystalline silicon substrate between the alternating continuous N-type emitter regions and segmented P-type emitter regions and in locations of the gaps between segments of the segmented P-type emitter regions. An approximately Gaussian distribution of P-type dopants is included in the N-type single crystalline silicon substrate below the segmented P-type emitter regions. A maximum concentration of the approximately Gaussian distribution of P-type dopants is approximately in the center of each of the segmented P-type emitter regions between first and second sides of each of the segmented P-type emitter regions. Substantially vertical P/N junctions are included in the N-type single crystalline silicon substrate at the trenches formed in locations of the gaps between segments of the segmented P-type emitter regions.

A photovoltaic device includes a digital alloy buffer layer including a plurality of alternating layers of semiconductor material. An absorption layer epitaxially is grown on the digital alloy buffer layer, an intrinsic layer is formed on the absorption layer and a doped layer is formed on the intrinsic layer. A conductive contact is formed on the doped layer.

A manufacturing method of a solar cell having diffusion layers of different conductivity types on a front surface of a semiconductor substrate and a back surface thereof, respectively, includes a step of forming a diffusion protection mask containing impurities to cover at least a partial region of the semiconductor substrate, and a diffusion step of performing a diffusion step including a thermal step in a state where at least the partial region of the semiconductor substrate is covered with the diffusion protection mask containing impurities, forming a first-impurity diffusion layer in a first region covered with the diffusion protection mask, and forming a second-impurity diffusion layer having a different impurity concentration or a different conductivity type from that of the diffusion protection mask in a second region exposed from the diffusion protection mask.