Patent classifications
H10H20/816
LIGHT EMITTING ELEMENT
A light emitting element emits an ultraviolet ray, and includes: an n-type layer containing an n-type group III nitride semiconductor containing Al; an active layer located over the n-type layer, containing a group III nitride semiconductor containing Al, and having a quantum well structure including a well layer and a barrier layer; and a p-type layer located over the active layer and containing a p-type group III nitride semiconductor containing Al, and the barrier layer includes a first barrier layer non-doped or doped with an n-type impurity, and a second barrier layer located over the first barrier layer, being in contact with a surface of the well layer at a side of the n-type layer, and doped with an n-type impurity at a concentration higher than a concentration of the n-type impurity doped in the first barrier layer.
Micro-LED structure including continuous light emitting layer, and micro-LED chip including same
A micro-LED chip includes multiple micro-LEDs. At least one micro-LED of the multiple micro-LEDs includes: a first type conductive layer; a second type conductive layer stacked on the first type conductive layer; and a light emitting layer formed between the first type conductive layer and the second type conductive layer. The light emitting layer is continuously formed on the whole micro-LED chip, the multiple micro-LEDs sharing the light emitting layer. A profile of the second type conductive layer perpendicularly projected on a top surface of the first type conductive layer is surrounded by an edge of the first type conductive layer.
Pixel for micro-display having vertically stacked sub-pixels
A unit pixel of a microdisplay is disclosed. In the unit pixel, sub-pixels that form blue light, green light, and red light are vertically stacked on a growth substrate. Accordingly, the unit pixel area may be reduced, and pixel transfer processing is facilitated.
Ultraviolet light emitting element and light emitting element package including the same
An embodiment discloses an ultraviolet light emitting element including: a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, and an etched region in which the first conductive semiconductor layer is exposed; a first insulating layer disposed on the light emitting structure and including a first hole which exposes a portion of the etched region; a first electrode electrically connected to the first conductive semiconductor layer; and a second electrode electrically connected to the second conductive semiconductor layer, wherein the light emitting structure includes an intermediate layer regrown on the first conductive semiconductor layer exposed in the first hole, the first electrode is disposed on the intermediate layer, the etched region includes a first etched region disposed at an inner side and a second etched region disposed at an outer side based on an outer side surface of the first electrode, and a ratio of an area of the first etched region and an area of the intermediate layer is 1:0.3 to 1:0.7, and a light emitting element package including the same.
Ultraviolet light emitting element and light emitting element package including the same
An embodiment discloses an ultraviolet light emitting element including: a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, and an etched region in which the first conductive semiconductor layer is exposed; a first insulating layer disposed on the light emitting structure and including a first hole which exposes a portion of the etched region; a first electrode electrically connected to the first conductive semiconductor layer; and a second electrode electrically connected to the second conductive semiconductor layer, wherein the light emitting structure includes an intermediate layer regrown on the first conductive semiconductor layer exposed in the first hole, the first electrode is disposed on the intermediate layer, the etched region includes a first etched region disposed at an inner side and a second etched region disposed at an outer side based on an outer side surface of the first electrode, and a ratio of an area of the first etched region and an area of the intermediate layer is 1:0.3 to 1:0.7, and a light emitting element package including the same.
Advanced electronic device structures using semiconductor structures and superlattices
Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a semiconductor structure with a p-type superlattice region, an i-type superlattice region, and an n-type superlattice region is disclosed. The semiconductor structure can have a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. In some cases, there are no abrupt changes in polarisation at interfaces between each region. At least one of the p-type superlattice region, the i-type superlattice region and the n-type superlattice region can comprise a plurality of unit cells exhibiting a monotonic change in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.
Semiconductor device package and method of manufacturing the same
A semiconductor device package includes a carrier, an emitting element and a first package body. The carrier includes a first surface and a second surface opposite to the first surface. The emitting element is disposed on the first surface of the carrier. The first package body is disposed over the first surface of the carrier and spaced apart from the first surface of the carrier.
Semiconductor device package and method of manufacturing the same
A semiconductor device package includes a carrier, an emitting element and a first package body. The carrier includes a first surface and a second surface opposite to the first surface. The emitting element is disposed on the first surface of the carrier. The first package body is disposed over the first surface of the carrier and spaced apart from the first surface of the carrier.
Enhanced room temperature mid-IR LEDs with integrated semiconductor ‘metals’
Mid-IR light emitting diodes (LEDs) based on type-II quantum dot (QD) active regions grown with monolithically integrated semiconductor metal layers are provided. These LEDs comprise layers of type-II semiconductor (e.g., InGaSb) quantum dots integrated into a pn junction diode (e.g., InAs) grown above a highly doped backplane, such as an n++ InAs backplane, all in the same epitaxial growth. Aspects described herein minimize non-radiate recombination times and significantly increase radiative recombination rates by controlling the emission of the emitting QDs in the near field of an optical metal.
LED array and method of forming a LED array
A Light Emitting Diode (LED) array precursor is provided. The LED array precursor comprises a substrate having a substrate surface, a first LED stack, a p++ layer, a n++ layer and a second LED stack. The first LED stack is provided on a first portion of the substrate surface. The first LED stack comprises a plurality of first Group III-nitride layers defining a first semiconductor junction configured to output light having a first wavelength wherein a n-type side of the first semiconductor junction is orientated towards the substrate surface. The p++ layer is provided on the first LED stack, the p++ layer comprising a Group III-nitride. The n++ layer has a first portion covering the p++ layer of the first LED stack and a second portion covering a second portion of the substrate surface, wherein a tunnel junction is formed at an interface between the n++ layer and the p++ layer, the n++ layer comprising a Group III-nitride. The second LED stack is provided on the second portion of the n++ layer covering the second portion of the substrate surface. The second LED stack comprises a plurality of second Group III-nitride layers defining a second semiconductor junction configured to output light having a second wavelength different to the first wavelength, wherein a n-type side of the semiconductor junction is provided towards the n++ layer. A method of manufacturing a LED array precursor is also provided.