An electrical power converter can include a plurality of layers disposed on a substrate. An emitter, including a first semiconductor junction that is formed at an interface between a first pair of adjacent layers, can produce light in response to a first electrical signal. An absorber, including a second semiconductor junction that is formed at an interface between a second pair of adjacent layers, can absorb at least some of the light. Circuitry can produce a second electrical signal in response to the absorbed light. The second electrical signal can be substantially proportional to the first electrical signal and can be electrically isolated from the first electrical signal. Because the light can remain within the layers during use, the electrical power converter can have a higher efficiency than a comparable device that propagates the light through at least one interface between air and a semiconductor material.

An electrical power converter can include a plurality of layers disposed on a substrate. An emitter, including a first semiconductor junction that is formed at an interface between a first pair of adjacent layers, can produce light in response to a first electrical signal. An absorber, including a second semiconductor junction that is formed at an interface between a second pair of adjacent layers, can absorb at least some of the light. Circuitry can produce a second electrical signal in response to the absorbed light. The second electrical signal can be substantially proportional to the first electrical signal and can be electrically isolated from the first electrical signal. Because the light can remain within the layers during use, the electrical power converter can have a higher efficiency than a comparable device that propagates the light through at least one interface between air and a semiconductor material.

In one embodiment, an apparatus includes a substrate, an oxide layer on the substrate, a silicon layer on the oxide layer, which includes a waveguide region and etched regions adjacent to the waveguide region, a germanium layer on the silicon layer and adjacent the waveguide region of the silicon layer, and a resistive element adjacent to the germanium layer to provide heat to the germanium layer in response to a current applied to the resistive element.

Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.

A method of wagering includes the steps of developing an NN grid based on selections from a bettor, the selections being based on different independent events conducted at different times; receiving a selection of at least one of the events; and displaying specific details of the selection. A non-transitory machine-readable storage medium, having encoded thereon program code, wherein, when the program code is executed by a machine, the machine implements the method is also provided. The method can be performed on any mobile computing device, computer, smart television, or other device properly equipped to perform and display such method.

A method of wagering includes the steps of developing an NN grid based on selections from a bettor, the selections being based on different independent events conducted at different times; receiving a selection of at least one of the events; and displaying specific details of the selection. A non-transitory machine-readable storage medium, having encoded thereon program code, wherein, when the program code is executed by a machine, the machine implements the method is also provided. The method can be performed on any mobile computing device, computer, smart television, or other device properly equipped to perform and display such method.

There is provided a semiconductor device that can improve cooling efficiency of Peltier effect elements. A semiconductor device includes: semiconductor elements; Peltier effect elements that are attached to first surfaces of the semiconductor elements without a wiring board; and a package substrate to which the semiconductor elements are attached. A region of the package substrate facing the first surfaces of the semiconductor elements is provided with a first recess or a through hole. The Peltier effect element is disposed in the first recess or in the through hole.

There is provided a semiconductor device that can improve cooling efficiency of Peltier effect elements. A semiconductor device includes: semiconductor elements; Peltier effect elements that are attached to first surfaces of the semiconductor elements without a wiring board; and a package substrate to which the semiconductor elements are attached. A region of the package substrate facing the first surfaces of the semiconductor elements is provided with a first recess or a through hole. The Peltier effect element is disposed in the first recess or in the through hole.

A solid-state imaging device and an electronic apparatus are to be provided to solve problems in processing in a structure in which an active chip is bonded to the wafer of a solid-state imaging element chip and is covered with an insulating film such as an oxide film.

The solid-state imaging device includes: a solid-state imaging element chip; an active chip bonded to the lower surface of the solid-state imaging element chip; a dummy chip that is bonded to the lower surface of an electrode pad of the solid-state imaging element chip and has an end surface parallel to the cutting plane of the solid-state imaging element chip cut out from a wafer; and a planarized insulating film that covers the bonding surface, or a solid-state imaging element chip; an active chip bonded to the solid-state imaging element chip; one or more dummy chips that are bonded to a free region on the bonding surface; and a planarized insulating film that covers the bonding surface side, or a solid-state imaging element chip; an active chip bonded to the solid-state imaging element chip; a planarized insulating film that covers the peripheral side surfaces and the lower surface of the active chip; and a silicon substrate that surrounds the peripheral side surfaces of the insulating film and has a lower surface formed in the same plane as the insulating film.

A solid-state imaging device and an electronic apparatus are to be provided to solve problems in processing in a structure in which an active chip is bonded to the wafer of a solid-state imaging element chip and is covered with an insulating film such as an oxide film.

The solid-state imaging device includes: a solid-state imaging element chip; an active chip bonded to the lower surface of the solid-state imaging element chip; a dummy chip that is bonded to the lower surface of an electrode pad of the solid-state imaging element chip and has an end surface parallel to the cutting plane of the solid-state imaging element chip cut out from a wafer; and a planarized insulating film that covers the bonding surface, or a solid-state imaging element chip; an active chip bonded to the solid-state imaging element chip; one or more dummy chips that are bonded to a free region on the bonding surface; and a planarized insulating film that covers the bonding surface side, or a solid-state imaging element chip; an active chip bonded to the solid-state imaging element chip; a planarized insulating film that covers the peripheral side surfaces and the lower surface of the active chip; and a silicon substrate that surrounds the peripheral side surfaces of the insulating film and has a lower surface formed in the same plane as the insulating film.