Disclosed herein is a junction barrier Schottky diode that includes a semiconductor substrate, a drift layer provided on the semiconductor substrate, an anode electrode and a p-type semiconductor layer each contacting the drift layer, an n-type semiconductor layer contacting the anode electrode and the drift layer, a metal layer provided between the n-type semiconductor layer and the p-type semiconductor layer, and a cathode electrode contacting the semiconductor substrate.

A wide-band-gap diode and manufacturing method thereof are provided. The method of manufacturing a wide-band-gap diode involves growing an N-type doped epitaxial layer on an N-doped substrate. P-type ions are implanted into the epitaxial layer to form an active area, a junction termination extension region, and an edge region. The active area exhibits an axially symmetric graticule pattern, with higher doping area density towards the center of the active area. The junction termination extension region surrounds the active area, and the edge region encircles both of the active area and the junction termination extension region to enhance the wide-band-gap diode's capability to withstand surge currents.

A process for creating low defectivity epitaxial layers on a SiC substrate. A plurality of pillars are formed in the SiC substrate. A first SiC epitaxial layer is formed using epitaxial lateral overgrowth. The first SiC epitaxial layer comprises the pillars formed in the SiC substrate and the epitaxial lateral overgrowth. A second SiC epitaxial layer is formed overlying the first epitaxial layer. The second SiC epitaxial layer is formed using epitaxial vertical overgrowth. The SiC substrate, the first SiC epitaxial layer, and the second SiC epitaxial layer are single crystal. Defect propagation in growing the second SiC epitaxial layer is minimized by decreasing a top surface area of the plurality of pillars in relation to a surface area of the epitaxial lateral overgrowth.

A semiconductor substrate comprising a first epitaxial silicon carbide layer and a second silicon carbide epitaxial layer. At least one semiconductor device is formed in or on the second silicon carbide epitaxial layer. The semiconductor substrate is formed overlying a silicon carbide substrate having a surface comprising silicon carbide and carbon. An exfoliation process is used to remove the semiconductor substrate from the silicon carbide substrate. The carbon on the surface of the silicon carbide substrate supports separation. A portion of the silicon carbide substrate on the semiconductor substrate is removed after the exfoliation process. The surface of the silicon carbide substrate is prepared for reuse in subsequent formation of semiconductor substrates.

The present description relates to a vertical power component formed in and on a semiconductor substrate doped with a first conductivity type and coated, on the upper side thereof, with a semiconductor layer doped with the first conductivity type. The component includes: an active region (100A); and first and second groups of first concentric field limiting rings surrounding the active region. Each first ring includes a first semiconductor region doped with a second conductivity type, opposite to the first conductivity type, extending vertically into the thickness of the semiconductor layer from the upper side thereof; and a second field limiting ring laterally interposed between the first and second groups of first field limiting rings (GR). The second ring includes a second doped semiconductor region of the second conductivity type extending vertically into the thickness of the semiconductor layer from the upper face thereof. The second semiconductor region has a width at least three times larger than the width of the widest first semiconductor region.

A method for manufacturing a silicon carbide semiconductor device includes steps below. A silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface, the first main surface having a maximal diameter greater than 100 mm, is prepared. An impurity region is formed on a side of the first main surface of the silicon carbide substrate. In a plan view, a cover member is arranged on the side of the first main surface so as to cover at least the entire impurity region. The silicon carbide substrate is annealed at a temperature lower than a melting point of the cover member while the cover member is arranged on the side of the first main surface of the silicon carbide substrate.

A Schottky diode comprising a cathode region, an anode region and a guard ring region, wherein the anode region may comprise a metal Schottky contact, and the guard ring region may comprise an outer guard ring and a plurality of inner open stripes inside the outer guard ring, and wherein the inner open stripes has a shallower junction depth than the outer guard ring.

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.

A semiconductor device includes self-arc-extinguishing elements and a clamp circuit. Each of the self-arc-extinguishing elements has a control terminal and main electrode terminals. The clamp circuit clamps, at the time of turnoff of one of the self-arc-extinguishing elements, the voltage between the main electrode terminals of the self-arc-extinguishing element at a clamp voltage set equal to or lower than 70% of a static withstand voltage that the self-arc-extinguishing element has. The self-arc-extinguishing elements are connected in series with each other. The clamp circuit may be provided between the control terminal and the main electrode terminal of the self-arc-extinguishing elements. The clamp circuit may include a circuit formed by connecting Zener diodes in series such that an anode of one of the Zener diodes is connected to a cathode of another Zener diode.

A Schottky barrier diode is provided, which includes a semiconductor substrate, a first well region, an isolation region, a silicide layer and a silicon oxide-containing layer. The first well region of a first conductivity type is in the semiconductor substrate. The isolation region is in the first well region. The silicide layer is laterally adjacent to the isolation region, and over and in contact with the first well region. The silicon oxide-containing layer is over and in contact with the isolation region.