It makes it easier to reduce the line capacitance of vertical signal lines in a solid-state image sensor in which signals are output via the vertical signal lines. The solid-state image sensor is provided with a logic circuit, a pixel circuit, and a negative capacitance circuit. In the solid-state image sensor, the logic circuit processes an analog signal. Also, in the solid-state image sensor, the pixel circuit generates an analog signal by photoelectric conversion, and outputs the analog signal to the logic circuit via a predetermined signal line. In the solid-state image sensor, the negative capacitance circuit is connected to the predetermined signal line.

First and second readout circuits, each having a respective floating diffusion node, are coupled to a photodetection element within a pixel of an integrated-circuit image sensor. Following an exposure interval in which photocharge is accumulated within the photodetection element, a first portion of the accumulated photocharge is transferred from the photodetection element to the first floating diffusion node to enable generation of a first output signal within the first readout circuit, and a second portion of the accumulated photocharge is transferred from the photodetection element to the second floating diffusion node to enable generation of a second output signal within the second readout circuit. A digital pixel value is generated based on the first and second output signals.

An image sensor includes a pixel array including a plurality of pixel groups, each of the plurality of pixel groups including a plurality of unit pixels and sharing a single microlens, the plurality of unit pixels in each of the plurality of pixel groups including color filters of the same color, and a control logic configured to group the plurality of unit pixels of each of the plurality of pixel groups into a plurality of subgroups and to drive the pixel array for each subgroup. The plurality of subgroups include a first subgroup and a second subgroup. The control logic may be configured to obtain first image data corresponding to the first subgroup and second image data corresponding to the second subgroup, and the first subgroup and the second subgroup are provided with at least one unit pixel therebetween in the first direction or the second direction.

An image sensor may include an array of image pixels arranged in rows and columns. Each column of pixels may be coupled to current source transistors and a threshold voltage mitigation circuit. The threshold voltage mitigation circuit may include a long p-channel device for producing a reference current for the current source transistors. The mitigation circuit also includes an autozero transistor and a sampling transistor for passing a global control voltage to the current source transistors. The global control voltage may be generated using a control voltage generator that includes current mirroring circuits and a replica of the current source transistors and the threshold voltage mitigation circuit.

An image capturing apparatus may include a first time of flight (ToF) sensor configured to calculate a distance to a target object using the time difference between a reference pulse time at which a modulated light signal is irradiated and a pulse sensing time at which a reflected modulated light signal, reflected from the target object and incident thereon, is sensed, a second ToF sensor configured to calculate the distance to the target object using a phase difference between the modulated light signal and the reflected modulated light signal, and a controller configured to enable any one of the first and second ToF sensors, based on first pixel data which the first ToF sensor generates to sense the reflected modulated light signal.

An image sensing device includes a first sampling circuit suitable for sampling a reference ramp signal as a ramp signal; a switching circuit suitable for sequentially outputting first and second pixel signals to a common node based on first and second control signals; a second sampling circuit suitable for sampling the first and second pixel signals, which are sequentially outputted through the common node, as a measurement signal; a comparison circuit suitable for comparing the ramp signal with the measurement signal and generating a comparison signal corresponding to a comparison result; and a count circuit suitable for generating a count signal, which corresponds to a voltage level of the measurement signal, based on the comparison signal and a clock signal.

An imaging apparatus is provided in which signals from a plurality of pixels are output to signal output lines during a predetermined reading period, a first reading mode and a second reading mode where analog-to-digital (AD) conversion circuits perform AD conversion on the signals are included, and the reading period includes a first period from when the signals from the pixels are output to the signal output lines to when the AD conversion circuits start AD conversion on the signals a predetermined time later, and a second period where the AD conversion circuits perform the AD conversion on the signals from the pixels, the reading period is equal between the first and second reading modes, and lengths of the first and second periods are different from each other.

An object is to reduce a circuit scale in a solid-state imaging element that detects an address event. The solid-state imaging element is provided with a plurality of photoelectric conversion elements, a signal supply unit, and a detection unit. In this solid-state imaging element, each of the plurality of photoelectric conversion elements photoelectrically converts incident light to generate a first electric signal. Furthermore, in the solid-state imaging element, the detection unit detects whether or not a change amount of the first electric signal of each of the plurality of photoelectric conversion elements exceeds a predetermined threshold and outputs a detection signal indicating a result of the detection result.

Provided is a solid-state imaging device including a pixel array in which a plurality of pixels is two-dimensionally arrayed in a row direction and a column direction, and a control unit that sets a range to output pixel signals of the plurality of pixels in the pixel array to each of the row direction and the column direction. The solid-state imaging device further includes a vertical scanning unit that outputs the pixel signals of the plurality of pixels in the range in the column direction set by the control unit, for each row and in the column direction, and a column A/D converter that converts the pixel signals of the plurality of pixels in the range in the row direction set by the control unit from analog signals into digital signals, for each column and in the row direction.

A solid-state imaging device includes a plurality of pixels in a two-dimensional array. Each pixel includes a photoelectric conversion element that converts incident light into electric charge, and a charge holding element that receives the electric charge from the photoelectric conversion element, and transfers the electric charge to a corresponding floating diffusion. The charge holding element further includes a plurality of electrodes.