H04N5/374

Signal processing apparatus and method, imaging element, and electronic apparatus

The present disclosure relates to a signal processing apparatus and method, an imaging element, and an electronic apparatus capable of suppressing deterioration of subjective image quality. Driving of a shift register controlling transfer of pixel data of digital data obtained by A/D conversion is stopped in a part or the entirety of a period in which the A/D conversion is performed on a pixel output of an analog signal. The present disclosure can be applied to, for example, a signal processing apparatus, an imaging element, an imaging device, an image processing apparatus, an electronic apparatus, a signal processing method, a program, or the like.

Analog to digital converter, solid-state imaging element, and control method of analog to digital converter

A differential amplifier circuit amplifies a difference between an input analog signal and a ramp signal which changes over time and outputs a difference signal. An amplifying element amplifies the difference signal and outputs the same as an amplified signal. A time measuring unit measures a length of a conversion period until a level of the analog signal substantially coincides with a level of the ramp signal on the basis of a level of the amplified signal and outputs the same as a digital signal obtained by converting the analog signal. One end of a capacitor is connected to one of an input terminal and a predetermined connection terminal of the amplifying element. A switch connects the other end of the capacitor to the other of the input terminal or the predetermined connection terminal in the conversion period, and disconnects the other end outside the conversion period.

Identification apparatus and sorting system

An identification apparatus includes: a plurality of light capturing units including light-capturing optical systems configured to capture a plurality of Raman scattered light fluxes from a sample, an optical fiber unit configured to include a plurality of optical fibers configured to respectively guide the captured Raman scattered light fluxes and in which the optical fibers are bundled at emission end portions thereof; a spectral element configured to disperse the guided Raman scattered light fluxes; an imaging unit configured to receive the dispersed Raman scattered light fluxes; and a data processor configured to acquire spectral data of the Raman scattered light fluxes from the imaging unit and configured to perform an identification process. The Raman scattered light fluxes dispersed by the spectral element are projected so that a spectral image formed on a light-receiving surface of the imaging unit extends along a main scanning direction of the imaging unit.

Imaging device with USB PD-compliance detection based operation

An imaging device is an imaging device in and from which a battery can be fitted, the imaging device including a CMOS image sensor, a USB port, and a microcomputer. The CMOS image sensor images a subject. The USB port supplies power to the imaging device via a USB cable. The microcomputer detects whether or not the battery is fitted in the imaging device. The microcomputer enables an action of the CMOS image sensor by way of the power from the USB port when the battery is fitted in the imaging device. The microcomputer disables the action of the imaging unit that rely on the power from the USB port when the battery is not fitted in the imaging device.

Image sensor including pixels mirror symmetric with each other

An image sensor may include a plurality of first pixels arranged on a substrate along a first axis and a second axis, the plurality of first pixels connected to a first output line, a plurality of second pixels arranged on the substrate along the first axis and the second axis, the plurality of second pixels being mirror-symmetric to the plurality of first pixels along the first axis, and the plurality of second pixels connected to the first output line, a plurality of first color filters, and a plurality of second color filters.

Photodetection apparatus, electronic apparatus and photodetection method
11265500 · 2022-03-01 · ·

A photodetection apparatus according to one embodiment has a photodetection element, first reset circuitry configured to select whether to set on-resistance between a first voltage node and a terminal of the photodetection element to a first value, second reset circuitry configured to select whether to set the on-resistance to a second value smaller than the first value, and control circuitry configured to set the on-resistance to the first value by the first reset circuitry after the photodetection element detects light, and set the on-resistance to the second value by the second reset circuitry after the first reset circuitry select to set the on-resistance to the first value.

Image sensor and method of operating the same with resetting of a dummy reset array and reading of a dummy read array

An image sensor includes an active pixel array, at least one dummy reset array, a dummy read array, and an image processor. The image processor sequentially resets respective rows of pixels included in the at least one dummy reset array in a period in which pixels of the active pixel array do not perform a reset operation, and sequentially reads respective rows of pixels included in the dummy read array in a period in which the pixels of the active pixel array do not perform a read operation.

Image sensing device for reducing mismatch occurring between readout circuits
11265505 · 2022-03-01 · ·

An image sensing device includes first to fourth column lines disposed sequentially in a row direction, first and third unit pixel circuits arranged in a first row and coupled to the first and third column lines, respectively, second and fourth unit pixel circuits arranged in a second row and coupled to the second and fourth column lines, respectively, first to fourth readout circuits, a first path change circuit for changing first and second paths so that the first and second unit pixel circuits are coupled to the first and second readout circuits according to a first relationship during a first unit time, and a second path change circuit for changing third and fourth paths so that the third and fourth unit pixel circuits are coupled to the third and fourth readout circuits according to a second relationship during the first unit time.

Photoelectric conversion device and photoelectric conversion system
11265501 · 2022-03-01 · ·

A photoelectric conversion device includes pixels including first and second photoelectric converters, a memory unit, and a transfer unit for transferring signals in the memory unit to a processing unit. The pixels output a first signal based on a signal of the first photoelectric converter, and a second signal based on signals of the first and second photoelectric converters. The transfer unit performs on row-by-row a first transfer period of transferring the first signal in the memory unit and a second transfer period of transferring the second signals held in the memory unit. A column a pixel outputting the first signal transferred during the first period of a first row is arranged is different from a column a pixel outputting the first signal transferred during the first period of a second row is arranged.

Photoelectric conversion apparatus and photoelectric conversion system
09813649 · 2017-11-07 · ·

In a photoelectric conversion apparatus, a pixel transistor and a differential transistor form a differential pair. A clamp circuit clamps a gate voltage of the differential transistor. An output circuit performs a first operation in which a voltage based on the voltage at the gate of a pixel transistor is output to the gate of the differential transistor. The output circuit also performs a second operation in which in response to receiving a current from the differential transistor, a signal based on a result of a comparison between the gate voltage of the pixel transistor and the gate voltage of the differential transistor is output to the output node. In the second operation, a control unit in the output circuit controls a change in the drain voltage of the differential transistor to be smaller than a change in the voltage at the output node.