Provided are a solid-state image pickup apparatus which includes: a semiconductor substrate having a plurality of photoelectric converters; a first and a second insulating layers formed on the semiconductor substrate; an optical waveguide formed above each of the plurality of photoelectric converters and in an opening portion of the first and the second insulating layers, and has a refractive index higher than a refractive index of the first insulating layer; and a light reflecting layer formed at a boundary between the optical waveguide and the second insulating layer, and has a refractive index lower than a refractive index of the optical waveguide, where the following expression is satisfied: α<90°, where a represents an angle formed by a boundary surface between the light reflecting layer and the second insulating layer with respect to a boundary surface between the first insulating layer and the second insulating layer.

An AD conversion circuit includes a comparator configured to compare an analog signal with a ramp signal and output a comparison result signal indicating a result of the comparison, and performs an AD conversion using the comparison result signal. In the comparison, a potential of the ramp signal changes with a lapse of time from a first potential to a second potential. Before the comparison, the potential of the ramp signal changes at a first change rate and then changes at a second change rate smaller than the first change rate, the potential of the ramp signal changes from the first potential to a third potential between the first potential and the second potential, and the comparator is reset in a state where the third potential is input to the comparator.

An imaging element having a layered structure including a first chip having a pixel portion in which pixels for photoelectrically converting an optical image of an object and generating a pixel signal are arranged two-dimensionally and a second chip in which a drive means of the pixel portion is arranged, and having a first output path to output the pixel signals of at least a first pixel group in the pixel portion and a second output path to output the pixel signals of a second pixel group, comprises the a conversion means for converting the pixel signals of the first and second output paths into digital signals and a control information generation means for generating control information of a photographing operation of the object by using the digital signal converted by the conversion means, wherein at least a part of the conversion means is arranged in the first chip.

Ping-pong readout architecture allows for faster frame rates in CMOS image sensors. However, various problems are created by this architecture due to cross-talk between components. Provided herein are novel ping-pong readout layouts which better isolate components to reduce crosstalk issues. Also provided herein are novel timing schemes for operating ping-pong readout circuits which prevent crosstalk signal spikes or readout corruption.

An image processing apparatus to execute noise reduction processing on image data includes a setting unit, a determination unit, and an output unit. The setting unit sets a pixel group from among a plurality of pixel group candidates. The plurality of pixel group candidates includes at least a first pixel group having a plurality of pixels being a first number of pixels or a second pixel group having a plurality of pixels being a second number of pixels which is different from the first number of pixels. The determination unit determines, based on a similarity between a target pixel and a reference pixel that is obtained according to the set pixel group, a weight corresponding to the reference pixel. The output unit outputs a value, calculated based on a pixel value of the reference pixel and the weight, as a noise-reduced pixel value of the target pixel.

A solid state image sensor includes a pixel array, as well as charge-to-voltage converters, reset gates, and amplifiers each shared by a plurality of pixels in the array. The voltage level of the reset gate power supply is set higher than the voltage level of the amplifier power supply. Additionally, charge overflowing from photodetectors in the pixels may be discarded into the charge-to-voltage converters. The image sensor may also include a row scanner configured such that, while scanning a row in the pixel array to read out signals therefrom, the row scanner resets the charge in the photodetectors of the pixels sharing a charge-to-voltage converter with pixels on the readout row. The charge reset is conducted simultaneously with or prior to reading out the signals from the pixels on the readout row.

The invention relates to a pixel of a CMOS imager, the pixel comprising: an infrared photodiode suitable for generating an electric current when it is exposed to an optical radiation having a wavelength greater than 950 nanometers, a conversion circuit able to receive electrons and deliver a voltage with a value varying as a function of the number of received electrons, a first switch connected between the infrared photodiode and the conversion circuit.

A solid state imaging device that includes a phase difference detection pixel which is a pixel for phase difference detection; a first imaging pixel which is a pixel for imaging and is adjacent to the phase difference detection pixel; and a second imaging pixel which is a pixel for imaging other than the first imaging pixel. An area of a color filter of the first imaging pixel is smaller than an area of a color filter of the second imaging pixel.

In some embodiments in accordance with the present disclosure, an image sensor is provided. The image sensor includes a substrate having a body. The body includes a first surface and a second surface opposite to the first surface. A through via is configured to extend from the first surface to the second surface. An intermediate layer is disposed over the body and configured to cover the through via. An image sensing device is disposed over the intermediate layer. In addition, a lens structure is disposed over the substrate, the intermediate layer and the image sensing device. In certain embodiments, the image sensing device is curved. In some embodiments, the image sensing device includes a semiconductor chip having a CMOS image sensing array.

An image sensor which operates in a global shutter mode is provided. The image sensor includes a pixel array comprising a plurality of pixels arranged in a plurality of rows and columns, a timing generator configured to generate row driver control signals which controls an integration period of a pixel of the plurality of pixels to include at least two sub integration periods, and a row driver configured to generate a plurality of row control signals which controls each of the rows in the pixel array based on the row driver control signals, wherein the timing generator is further configured to control a single image frame to include the integration period and a readout period of the pixel, based on the row driver control signals.