The present disclosure provides a method for generating an HDR image. The method includes: providing an image sensor, in which the image sensor includes a pixel array and a filter array disposed on the pixel array, and each filter unit in the filter array covers a plurality of pixel units in the pixel array so as to constitute a pixel structure unit; and performing an exposure control to pixel units within each pixel structure unit respectively, in which a first part of the pixel units within each pixel structure unit are exposed for a first exposure time, a second part of the pixel units within the pixel structure unit are exposed for a second exposure time, and the first exposure time is greater than the second exposure time.

A pixel unit includes a photoelectric conversion element; a first transistor, which is coupled to the photoelectric conversion element, configured to transfer an electric charge that has been subjected to photoelectric conversion at the photoelectric conversion element; a second transistor configured to reset the electric charge transferred by the first transistor; and a diffusion region including diffused impurities. The diffusion region accumulates the electric charge transferred from the first transistor. The diffusion region is disposed between the first and second transistors. The diffusion region includes a first region that is directly coupled to gates of the first and second transistors; and a second region that is adjacent to the first region, the second region being directly coupled to the gate of the first transistor and being coupled to the second transistor via the first region. The impurity concentration is lower in the second region than in the first region.

An object is to provide an imaging device in which a circuit for reading a signal is provided in a pixel region. The imaging device includes a first pixel and a second pixel. The first pixel is capable of outputting a first signal output from a pixel circuit included in the first pixel or a second signal input from the first pixel in the previous stage, to the first pixel or the second pixel in the next stage. The second pixel is capable of outputting, to the outside, the first signal or the second signal, which is input from the first pixel in the previous stage, or a third signal output from a pixel circuit included in the second pixel.

At least one example embodiment discloses a method of generating an image using a global shutter image sensor. The method includes accumulating a first plurality of charges during a first exposure time from a first plurality of pixels, accumulating a second plurality of charges during a plurality of second exposure times from a second plurality of pixels, the plurality of second exposure times occurring during the first exposure time and being shorter than the first exposure time and generating the image based on the first plurality of charges and the second plurality of charges.

A circuit board design uses CMOS sensors for the tip section of a multi-viewing element endoscope. Side sensors and their optical assemblies are assembled to a common base board to save space. Individual base boards are separately constructed, inserted into grooves of a main base board, and are further connected to the main base board by means of flexibal circuit boards.

A radiation therapy system is configured with fast readout of X-ray images with significantly reduced image lag. A reset phase is included in the process of acquiring an X-ray image to reduce image lag in a subsequently acquired X-ray image. During the reset phase, residual charge is concurrently transferred from multiple arrays of pixel detector elements in an X-ray detector panel. As a result, image lag present in a subsequent X-ray image is minimized or otherwise reduced.

There is provided an image sensor employing an avalanche diode. The image sensor includes a plurality of pixel circuits arranged in a matrix, a plurality of pulling circuits, a plurality of output circuits and a global current source circuit. Each of the plurality of pixel circuits includes a single photon avalanche diode and a P-type or N-type select switch transistor. Each of the plurality of pulling circuits is arranged corresponding to one pixel circuit column. The global current source circuit is used to form a current mirror with each of the plurality of pulling circuits. Each of the plurality of output circuits is shared by at least two pixel circuits.

An image sensor is described having a pixel cell unit. The pixel cell unit has first, second and third transfer gate transistor gates on a semiconductor surface respectively coupled between first, second and third visible light photodiode regions and a first capacitance region. The pixel cell unit has a fourth transfer gate transistor gate on the semiconductor surface coupled between a first infrared photodiode region and a second capacitance region.

A vehicular multi-camera surround view system includes a front camera, a driver-side camera, a passenger-side camera and a rear backup camera. Image data captured by the cameras is conveyed to an electronic control unit. The electronic control unit is operable to combine image data conveyed from the front camera, the driver-side camera, the passenger-side camera and the rear backup camera to form composite video images, which are output for display at a display device. Rear backup video images are displayed no later than two seconds after the driver of the vehicle first changes propulsion of the vehicle during a new ignition cycle to reverse mode. Upon changing propulsion of the vehicle during the new ignition cycle to reverse mode to commence a backup event subsequent to the first backup event, the video display screen displays video images derived, at least in part, from image data captured by the rear backup camera.

Embodiments of a hybrid imaging sensor that optimizes a pixel array area on a substrate using a stacking scheme for placement of related circuitry with minimal vertical interconnects between stacked substrates and associated features are disclosed. Embodiments of maximized pixel array size/die size (area optimization) are disclosed, and an optimized imaging sensor providing improved image quality, improved functionality, and improved form factors for specific applications common to the industry of digital imaging are also disclosed. Embodiments of the above may include systems, methods and processes for staggering ADC or column circuit bumps in a column or sub-column hybrid image sensor using vertical interconnects are also disclosed.