Provided is a technology capable of reducing the number of resources necessary for logic implementation in a control device. A semiconductor LSI design device generates a combinational circuit configured with functional blocks defined by a functional block library from an application specification, allocates an operation order of each functional block in the combinational circuit under a condition for starting an operation of a functional block connected to an input pin after ending the operation, converts into a sequence circuit which uses the functional block twice or more in a time division manner, extracts the operation order at a time of execution of the sequential circuit, and determines whether the operation order allocated to the combinational circuit coincide with the extracted operation execution order.

An apparatus is provided for analysis of a repair for a structure by identifying component parts of the structure that have common material properties and geometric constraints, and based thereon determining a generic repair component for the component parts that also have the common material properties and the geometric constraints. A set of loads are extracted from a loads model of the undamaged structure and redistributed in a loads redistribution model at a damaged or defective portion of the component part. The set of redistributed loads indicate loading incurred by the generic repair component under an external load. The apparatus then uses the redistributed loads to perform an analysis to determine a margin of safety of the generic repair component and, in instances in which the margin of safety is positive, outputs the material properties and geometric constraints of the generic repair component to a fabrication system for production thereof.

A computer-implemented method constructs a three-dimensional (3D) model, deletes data defining two or more features of the 3D model, and creates a new feature to replace the two or more features. Each of the two or more features has a set of faces, and a reduced amount of data is associated with the new feature with respect to the amount of data defining the two or more features. The method maps unique identifiers, enabling references to be retained and preventing a failure of an operation that uses the reference.

A machine learning model is trained by defining a scenario including models of vehicles and a typical driving environment. A model of a subject vehicle is added to the scenario and sensor locations are defined on the subject vehicle. A perception of the scenario by sensors at the sensor locations is simulated. The scenario further includes a model of a parked vehicle with its engine running. The location of the parked vehicle and the simulated outputs of the sensors perceiving the scenario are input to a machine learning algorithm that trains a model to detect the location of the parked vehicle based on the sensor outputs. A vehicle controller then incorporates the machine learning model and estimates the presence and/or location of a parked vehicle with its engine running based on actual sensor outputs input to the machine learning model.

A method for increasing the decoupling capacitance in a microelectronic circuit. The method comprises producing a circuit design of the microelectronic circuit, analyzing the produced circuit design, and subsequently filling gaps in the circuit design by cells with decoupling capacitor.

Systems and methods for semiconductor design evaluation. IC layout information of a circuit design is received, and the circuit design is decomposed into smaller circuit pieces. Each circuit piece has IC layout information and a netlist. For each circuit piece, a set of strike models is selected based on the layout information and the net-list of the circuit piece and received radiation environment information. Each strike model has circuit components with voltage values corresponding to a respective particle strike. For each selected strike model of a circuit piece: a radiation susceptibility metric is determined by comparing functional results of simulation of the of the strike model with functional results of simulation of the circuit piece. For each circuit piece, a radiation susceptibility metric is determined based on the radiation susceptibility metrics generated for each selected strike model of the circuit piece.

A learning agent is disclosed that receives data in sequence from one or more sequential data sources; generates a model modelling sequences of data and actions; and selects an action maximizing the expected future value of a reward function, wherein the reward function depends at least partly on at least one of: a measure of the change in complexity of the model, or a measure of the complexity of the change in the model. The measure of the change in complexity of the model may be based on, for example, the change in description length of the first part of a two-part code describing one or more sequences of received data and actions, the change in description length of a statistical distribution modelling, the description length of the change in the first part of the two-part code, or the description length of the change in the statistical distribution modelling.

A computer-implemented method for configuring a hardware verification system includes receiving, in the computer, a first data representative of a first design. The method further includes performing a first mapping of the first data to generate a second data in accordance with a first cost function and one or more first delays each associated with a different one of a first multitude of paths. One of the first multitude of paths includes a critical path characterized by a second delay. The method further includes performing a second mapping of the second data to generate a third data in accordance with a second cost function and a multitude of third delays each associated with a different one of a second multitude of paths and the second delay. The method further includes compiling the third data for configuring the hardware verification system.

Embodiments of the present invention may provide the capability to design SRAM cells may be designed that is compatible with the requirements of InGaAs integration by selective epitaxy in SiO.sub.2 cavities without sacrificing density and area scaling. In an embodiment of the present invention, a computer-implemented method for designing a hybrid integrated circuit may comprise receiving data representing a layout of a static random-access memory cell array, identifying areas between active channel regions that do not overlap with transistor gates of static random-access memory cells of the static random-access memory cell array, selecting from among the identified areas at least one area, expanding the selected areas to determine whether the expanded area intersects with a p-doped active Si semiconductor or p-channel semiconductor area, and marking as Si seed locations the identified expanded areas that do not intersect on both sides with a channel active transistor region.

Method, system and product for decomposing a simulation model. The method comprising automatically decomposing the simulation model into a predetermined number of co-simulation components, wherein each co-simulation component is allocated to a different simulation platform, wherein said automatically decomposing comprises: defining a target optimization function, wherein the target optimization function computes an estimated run time of the simulation model, wherein the target optimization function is based on a communication time within each co-simulation component and a communication time between each pair of co-simulation components; and determining a decomposition of the simulation model that optimizes a value of the target optimization function. The method further comprises executing the decomposed simulation model by executing in parallel each co-simulation component on a different simulation platform, whereby the simulation model is executed in a distributed manner.