G06F17/50

ADAPTIVE FORECASTING OF TIME-SERIES

For a time-series, a baseline error value is reduced to compute a target forecast error value by maximizing a net benefit value of a forecasted value of the time-series. For each forecasting model in a set of models, a corresponding model error value related to the time-series is computed. From the set, a subset of models is selected where each model in the subset has a cost that will produce a positive value for the net benefit. A selected model from the subset is associated with the time-series such that a model error value of the selected model is at most equal to the target forecast error. The time-series is forecasted using the selected model such that the forecasted value has an error of less than the baseline error at a future time, and the forecasted value produces a positive net benefit at the future time.

SIMULATION OF INTERNET OF THINGS ENVIRONMENT
20170364612 · 2017-12-21 ·

A method, system, and product for simulation of Internet of Things (IoT) environment. The method performed by a simulation node in the IoT environment, which comprises the simulation node and a cloud server connected by a computerized network. The method comprises selecting a simulated IoT device to simulate from a plurality of simulated IoT devices that are being simulated by the simulation node; invoking a real-world model to obtain real-world simulated values; determining a simulated behavior of the selected simulated IoT device by invoking a device model and providing the real-world simulated values thereto, o wherein the simulated behavior comprises transmitting a message to the cloud server; setting a next simulated action of the simulation node to occur at a designated time, wherein the next simulated action is the simulated behavior; and performing the next simulated action at the designated time.

SYSTEMS AND METHODS FOR PROCESS DESIGN AND ANALYSIS
20170364617 · 2017-12-21 ·

Systems and methods for process design and analysis of processes that result in products or analytical information are provided. A hypergraph data store is maintained and comprises versions of each process. A version comprises a hypergraph with nodes, for stages of the process, and edges. Stages have parameterized resource inputs associated with stage input properties, and input specification limits. Stages have resource outputs with output properties and output specification limits. Edges link the outputs of nodes to the inputs of other nodes. A run data store is maintained with a plurality of process runs, each run identifying a process version, values for the inputs of nodes in the corresponding hypergraph, their input properties, resource outputs of the nodes, and obtained values of output properties of the resource outputs. When a query identifies one or more inputs and/or outputs present in the run data store, they are formatted for analysis.

METHODS AND SYSTEMS FOR INVESTIGATION AND PREDICTION OF SLUG FLOW IN A PIPELINE

Methods and apparatus for investigating and predicting slug flow in complex pipes are disclosed. More particularly, the techniques provide a model of multiphase flow in a complex pipeline and its solution acquired using the Jacobian-Free Newton-Krylov (JFNK) method by way of non-limiting example. The fully implicit formulation framework described in this work enables to efficiently solve governing fluid flow equations. The framework can reduce the multiphase flow model in zones or cells of the pipe that exhibit phase disappearance based on the phase state distributions over the cells. The model of multiphase flow can include a model for single-phase cells that is different from a model for multiphase cells, and the proper model can be selected (or switched) as the phase characteristics of the multiphase flow of the cells change over time. A transient two-fluid model can be used to verify and validate the proposed algorithm for conditions of terrain-induced slug flow regime. The model can identify all the major features of experimental data, and is in a good quantitative agreement.

FEED-FORWARD FOR SILICON INSPECTIONS (DFM2CFM : DESIGN TO SILICON) & FEED-BACK FOR WEAKPOINT PREDICTOR DECKS (CFM2DFM : SILICON TO DESIGN) GUIDED BY MARKER CLASSIFICATION, SAMPLING, AND HIGHER DIMENSIONAL ANALYSIS

A method and apparatus for selecting Si wafer WP based on individual or multiple DFM decks for Si-feed-forward and Si-feed-back analysis are provided. Embodiments include generating markers for a wafer from an individual DFM deck; generating UCF Indexes; determining whether a representative marker corresponding to a UCF is a candidate for WP prediction; extracting markers corresponding to that UCF-Index (UEF data) from a candidate; performing a UCF-Index-based sampling on the extracted UEF data set if a number of markers in the extracted UEF data set is larger than an inspection requirement; adding a location of each marker or group of markers in the extracted UEF data set to a sitelist after the UCF-Index-based sampling; sending the sitelist to a foundry for metrology analysis on sitelist locations; and adding the sitelist locations and corresponding UCF Index and metrology parameters to a design analysis database for analyzing other wafers/UCF Indexes.

SIMULATION METHOD FOR MIXED-SIGNAL CIRCUIT SYSTEM AND RELATED ELECTRONIC DEVICE

A simulation method for a mixed-signal circuit system includes: detecting a plurality of registers and a clock signal included in the mixed-signal circuit system; performing a timing analysis converting operation upon a circuit block coupled between any two register of the plurality of registers to obtain a converted circuit system; and performing a Static Timing Analysis operation upon the converted circuit system; wherein when the circuit block is convertible into a combinational circuit block, the timing analysis converting operation includes: converting the circuit block to the combinational circuit block, wherein the combinational circuit block is logic gate-level.

LAYOUT METHOD FOR INTEGRATED CIRCUIT AND LAYOUT OF THE INTEGRATED CIRCUIT

A layout method includes: selecting, by a processor or manual, a first layout device in a layout of an integrated circuit; selecting a second device abutting the first layout device at a boundary between the first layout device and the second layout device, wherein a conductive path is disposed across the boundary of the first layout device and the second layout device; and disposing a cut layer on the conductive path and nearby the boundary. The first layout device is a first layout pattern and the second layout device is a second layout pattern different from the first layout pattern.

Verification of Untimed Nets
20170364620 · 2017-12-21 ·

Integrated circuits (ICs) rely on static timing analysis during their design to ensure that they will operate at desired frequencies. Delays between sequential elements (e.g., latches and flip-flops) are constrained to meet target clock periods. Certain signals, however, such as untimed nets may be excluded from timing constraints if the circuit function does not require these nets to switch and propagate to sequential elements within the clock period. However, a signal marked as “untimed” may have been mistakenly specified by the designer as an untimed net. To verify that an untimed net does not negatively impact the function of the design logic, the embodiments herein generate upstream and downstream event networks using shadow logic that corresponds to design logic upstream and downstream of the untimed net. A metastability network coupled to these networks is used to model nondeterminism and metastability resulting from transitions or potential glitches on the untimed net.

METHOD AND APPARATUS FOR AUTOMATION OF PERSONALIZED MAINTENANCE TASKS WITH BUILT-IN SIMULATION AND DATA SYNCHRONIZATION SUPPORT IN ENERGY DISTRIBUTION INDUSTRY OR OTHER INDUSTRY

A method and apparatus perform automation of personalized maintenance tasks with built-in simulation and data synchronization support in the energy distribution industry or other industry. A mobile device includes a transceiver and at least one processing device. The transceiver is configured to communicate with a field device. The at least one processing device is configured to detect a presence of the field device. The at least one processing device is also configured to execute multiple maintenance tasks associated with the field device in response to detecting the presence of the field device. The at least one processing device is also configured to generate a dashboard and present the dashboard on the mobile device. The dashboard displays results of the maintenance tasks to a user.

SYSTEM AND METHOD FOR MAXIMUM INTERCUSPATION ARTICULATION
20170360531 · 2017-12-21 · ·

A system for maximum intercuspation articulation, including a database including patient records and images, and a server in communication with the database and including processing circuitry configured to receive virtual modeling geometrics of two opposing dental models as an input, wherein the two opposing dental models include an upper dental model and a lower dental model of the patient. The processing circuitry is also configured to detect intersection regions between the upper dental model and the lower dental model and perform a simulation on the two opposing dental models, wherein the simulation includes applying simulated physics rules at the two opposing dental models. The processing circuitry is further configured to repeat the detection of the intersection regions and the simulation to generate a maximum intercuspation alignment of the two opposing dental models, mark the intersection regions on the maximum intercuspation alignment, and output the maximum intercuspation alignment.