A switching system comprises a controlling switch and a plurality of port extenders. One of the port extenders includes: at least one upstream port; multiple downstream ports; and a forwarding engine. A forwarding database is populated with entries indicating associations between i) respective network addresses corresponding to devices coupled to downstream ports, and ii) respective local downstream ports. The forwarding database excludes entries corresponding to network addresses corresponding to devices coupled to the at least one upstream port. The forwarding engine is configured to: for a first packet received via one of the local downstream ports, and having a destination network address in the forwarding database, forward the first packet to a different local downstream port indicated by the forwarding database. For a second packet received via one of the local downstream ports, and having a destination network address not in the forwarding database, forward the second packet to the at least one upstream port.

Technologies for performing switch-based collective operations in a fabric architecture include a network switch communicatively coupled to a plurality of computing nodes. The network switch is configured to identify sub-operations of a collective operation of a collective operation request received from one of the computing nodes and identify a plurality of operands for each of the sub-operations. The network switch is additionally configured to request a value for each of the operands from a corresponding target computing node at which the respective value is stored, determine a result of the collective operation as a function of the requested operand values, and transmit the result to the requesting computing node. Other embodiments are described herein.

In one embodiment, a method generally includes a first edge (E) node in a network receiving an encapsulated data packet, wherein the encapsulated data packet comprises an outer header and a data packet, wherein the outer header comprises a first router locator (RLOC) corresponding to the first E node, wherein the data packet comprises an internet protocol (IP) header, and wherein the IP header comprises a destination endpoint identification (EID) corresponding to a host H. The first E node determines whether the host H is attached to the first E node. And in response to the first E node determining the host is attached to the first E node, the first E node forwards the data packet to the host H. The first E node receives a message from another node after the host H detaches from the first E node and reattaches to another E node, wherein the message comprises the destination EID.

Packet forwarding methods, apparatuses, devices, and systems are disclosed. An example packet forwarding system includes a target virtual machine, a virtual switch and a network card device, wherein: the target virtual machine is configured to send a first packet to the virtual switch; the virtual switch is configured to add input port information to the first packet to obtain a second packet after receiving the first packet sent by the target virtual machine, and forward the second packet to the network card device; and the network card device is configured to determine a corresponding first forwarding rule based on the input port information included in the second packet in response to receiving the second packet sent by the virtual switch, and perform forwarding processing on the second packet based on the first forwarding rule.

In general, techniques are described for facilitating balanced cell handling by fabric cores of a fabric plane for an internal device switch fabric. In some examples, a routing system includes a plurality of fabric endpoints and a switching fabric comprising a fabric plane to switch cells among the fabric endpoints. The fabric plane includes two fabric cores and one or more inter-core links connecting the fabric cores. Each fabric core selects an output port of the fabric core to which to route a received cell of the cells based on (i) an input port of the fabric core on which the received cell was received and (ii) a destination fabric endpoint for the received cell, at least a portion of the selected output ports being connected to the inter-core links, and switches the received cell to the selected output port.

A network switch device is described. The network switch device includes a plurality of processor devices configured to perform different respective functions of the network switch device, a block of shared memory having a plurality of single port memory banks, and a memory controller configured to allocate respective sets of banks among the single port memory banks to processor devices among the plurality of processor devices, and determine respective configurations of the sets of memory banks as one of i) a single port configuration in which respective single port memory banks support a single read or write memory operation to a memory location in a memory access cycle, and ii) a virtual multi-port configuration in which respective single port memory banks support two or more concurrent read or write memory operations to a same memory location, based on memory access requirements of the corresponding processor device.

A novel multi-stage folded Clos network and a linecard for use in a network is disclosed. The Clos network can consist of three stages, an access stage, a lower stage, and an upper stage. The access stage and the upper stage can include a plurality of switches or conventional access points. The lower stage can include a plurality of linecards. Each linecard can be made of two switch chips, each of which are connected to the ports of the linecard, and contain the same number of ports. Each switch chip can forward information in only one direction and one is used to send direction from the access stage to the upper stage, and the other from the upper stage to the access stage. The lower stage can consist of a number of sub-stages, each sub-stage can be entirely of either conventional switches or linecards. Accordingly, compared to a conventional Clos network, the provided network can increase the throughput by any power of 2 by replacing the conventional switches used in the lower stage or sub-stages with linecards.

A switch architecture enables ports to stash packets in unused buffers on other ports, exploiting excess internal bandwidth that may exist, for example, in a tiled switch. This architecture leverages unused port buffer memory to improve features such as congestion handling and error recovery.

A crossbar switch is disclosed having a first port, a second port, a third port, and a fourth port, the crossbar switch comprising: a first switching element coupled between the first port and the third port; a second switching element coupled between the first port and the fourth port; a third switching element coupled between the second port and the third port; and a fourth switching element coupled between the second port and the fourth port, wherein the first switching element, the second switching element, the third switching element, and the fourth switching element are configured to couple only one of the first port and the second port to the third port, at any given time.

In one embodiment, a computer network system, includes at least one lower tier of lower switches, at least one upper tier of upper switches, and a middle tier of middle switches connected down-tier to ones of the lower switches and up-tier to ones of the upper switches, one of the middle switches including a clos topology arrangement of leaf and spine switches, the leaf switches being connected via K internal network connections to the spine switches, each leaf switch being connected to each spine switch, the leaf switches being connected via N down-tier network connections to ones of the lower switches and via M up-tier network connections to ones of the upper switches, there being more of the N down-tier network connections than there are of the M up-tier network connections, and there being less of the K internal network connections than there are of the N and M connections.