To provide a relay device capable of increasing the number of connected nodes in a bus-type network, and a connector providing the relay device. An active-star coupler as the relay device includes a bit width distortion correction circuit and a ringing pulse absorption circuit, corrects bit width distortion in bit units using the bit width distortion correction circuit and absorbs and eliminates ringing pulses in a terminus of a communication frame using the ringing pulse absorption circuit.

One embodiment of the present invention provides a switch. The switch includes a service management module and a packet processor. During operation, the service management module identifies a service provided by an appliance coupled to the switch via a local port. The packet processor constructs a notification message for a remote switch. The notification message includes information about the service and the appliance. In this way, the switch allows the remote switch to request the service.

Implementations of discovery functionalities in accordance with the present invention are characterized by being exceptionally minimalistic. A primary reason and benefit for such minimalistic implementations relate to these discovery functionalities being implemented via a management processor and associated resources of a system on a chip (SoC) unit as opposed to them being implemented on data processing components of a cluster of nodes (i.e., central processing core components). By focusing on such a minimalist implementation, embodiments of the present invention allow discovery functionalities to be implemented on a relatively low-cost low-power management processor coupled to processing cores that provide for data serving functionality in the cluster of nodes.

A cell processing method and apparatus are provided. The method includes: obtaining, by a first sending end, a first timestamp compensation time; adding, by the first sending end, the first timestamp compensation time to a first timestamp carried in a first cell, where the first timestamp is a sending time of the first cell; and sending, by the first sending end to a receiving end, the first cell that is added with the first timestamp compensation time, so that the receiving end forwards the first cell according to the first timestamp that is added with the first timestamp compensation time. In the present invention, a first timestamp compensation time is added to a first timestamp carried in a first cell, which improves cell forwarding efficiency of the receiving end and prevents the occurrence of cell accumulation in a link.

Methods, systems, and computer programs are presented for a switching server. One switching server includes a server, a switch module coupled to the server, and a switch controller coupled to the server and to the switch module. The server includes a processor executing an operating system that includes a network driver, and the network driver includes a first network device operating system (ndOS) program. Further, the switch module includes a switch fabric and input/output ports. The switch controller includes a processor and non-volatile storage, where the processor is configured to execute a second ndOS program. The first and second ndOS programs implement a global networking policy for a plurality of devices executing ndOS programs, the global networking policy including a definition for switching incoming packets through the plurality of devices executing the ndOS programs.

A disclosed switch includes: plural ports each of which is connected to another apparatus; a determination unit that determines, for each of the plural ports, whether the port is connected to one of plural switches integrated logically; and a setting unit that sets, for each of the plural ports, a port type or propriety of use based on a result of determination by the determination unit.

A method for line speed interconnect processing. The method includes receiving initial inputs from an input communications path, performing a pre-sorting of the initial inputs by using a first stage interconnect parallel processor to create intermediate inputs, and performing the final combining and splitting of the intermediate inputs by using a second stage interconnect parallel processor to create resulting outputs. The method further includes transmitting the resulting outputs out of the second stage at line speed.

Embodiments of the apparatus of dynamically renumbering ports relate to a network chip that minimizes the total logic on the network chip by limiting the number of states that needs to be preserved for all ports on the network chip. Each pipe on the network chip implements a dynamic port renumbering scheme that dynamically assigns a relative port number for each port assigned to that pipe. The dynamic port renumbering scheme allows for internal parallelism without increasing the total amount of state space required for the ports on the network chip.

A system for communication includes a station, including first and second interfaces having different, respective first and second network addresses on a packet data network, and a terminal, including third and fourth interfaces having different, respective third and fourth network addresses. The station is transmits data to the terminal over a first path directed from the first interface to the third network address, while the terminal transmits second data to the station over a second path directed from the fourth interface to the second network address. First and second TCP proxies are deployed respectively in the station and in the terminal, and are configured to emulate a TCP connection between the station and the terminal by transmitting TCP frames from the station to the terminal only over the first path and from the terminal to the station only over the second path.

A communication device includes a plurality of controllers, a plurality of buses that transmit transmission information, and a gateway to which the plurality of buses are collectively connected. Each of the plurality of controllers has a pattern table that defines, for each piece of the transmission information, a transmission bus pattern, and controls the input and output of the transmission information according to the pattern table. Each of the plurality of controllers is connected to at least two buses, and outputs, to the gateway via all of the connected buses, check information for a confirmation of connections to the connected buses. The gateway determines an interrupted bus from which no check information is input, and outputs, to each of the plurality of controllers, a route switch instruction instructing use of a pattern table that does not include the interrupted bus(es).