An apparatus is provided which comprises a full adder including magnetoelectric material and spin orbit material. In some embodiments, the adder includes: a 3-bit carry generation structure and a multi-bit sum generation structure coupled to the 3-bit carry generation structure. In some embodiments, the 3-bit carry generation structure includes at least three cells comprising magnetoelectric material and spin orbit material, wherein the 3-bit carry generation structure is to perform a minority logic operation on first, second, and third inputs to generate a carry output. In some embodiments, the multi-bit sum generation structure includes at least four cells comprising magnetoelectric material and spin orbit material, wherein the multi-bit sum generation structure is to perform a minority logic operation on the first, second, and third inputs and the carry output to generate a sum output.

An amplifier includes a graphene Hall sensor (GHS). The GHS includes a graphene layer formed above a substrate, a dielectric structure formed above a channel portion of the graphene layer, and a conductive gate structure formed above at least a portion of the dielectric structure above the channel portion of the graphene layer for applying a gate voltage. The GHS also includes first and second conductive excitation contact structures coupled with corresponding first and second excitation portions of the graphene layer for applying at least one of the following to the channel portion of the graphene layer: a bias voltage; and a bias current. The GHS further includes first and second conductive sense contact structures coupled with corresponding first and second sense portions of the graphene layer. The amplifier also includes a current sense amplifier (CSA) coupled to the GHS. The CSA senses current output from the GHS.

A memory device and a manufacturing method thereof are provided. The memory device includes a magnetic tunneling junction (MTJ) and a spin Hall electrode (SHE). The MTJ includes a free layer, a reference layer and a barrier layer lying between the free layer and the reference layer. The SHE is in contact with the MTJ, and configured to convert a charge current to a spin current for programming the MTJ. The SHE is formed of an alloy comprising at least one heavy metal element and at least one light transition metal element. The heavy metal element is selected from metal elements with one or more valence electrons filling in 5d orbitals, and the light transition metal element is selected from transition metal elements with one or more valence electrons partially filling in 3d orbitals.

Semiconductor device includes pair of active devices, composite spin Hall electrode, and a magnetic tunnel junction. Composite spin Hall electrode is electrically connected to pair of active devices. Magnetic tunnel junction is disposed on opposite side of composite spin hall electrode with respect to pair of active devices. Spin Hall electrode includes pair of heavy metal layers, and spacer layer disposed in between pair of heavy metal layers. Pair of heavy metal layers is made of a heavy metal in a metastable state. Spacer layer comprises first material different from the pair of heavy metal layers.

A magnetoresistive memory device includes a magnetic tunnel junction including a free layer, at least two tunneling dielectric barrier layers, and at least one metallic quantum well layer. The quantum well layer leads to the resonant electron tunneling through the magnetic tunnel junction in such a way that it strongly enhances the tunneling probability for one of the magnetization states of the free layer, while this tunneling probability remains much smaller in the opposite magnetization state of the free layer. The device can be configured in a spin transfer torque device configuration, a voltage-controlled magnetic anisotropy, a voltage controlled exchange coupling device configuration, or a spin-orbit-torque device configuration.

A magnetoresistive memory device includes a magnetic tunnel junction including a free layer, at least two tunneling dielectric barrier layers, and at least one metallic quantum well layer. The quantum well layer leads to the resonant electron tunneling through the magnetic tunnel junction in such a way that it strongly enhances the tunneling probability for one of the magnetization states of the free layer, while this tunneling probability remains much smaller in the opposite magnetization state of the free layer. The device can be configured in a spin transfer torque device configuration, a voltage-controlled magnetic anisotropy, a voltage controlled exchange coupling device configuration, or a spin-orbit-torque device configuration.

A magnetic device includes a stacked body including a first ferromagnetic layer, a second ferromagnetic layer, and a non-magnetic layer sandwiched between the first ferromagnetic layer and the second ferromagnetic layer; a first insulating layer which covers side surfaces of the stacked body; and a radiator located outside the first insulating layer with respect to the stacked body, in which a distance between the stacked body and the radiator differs depending on a position of the stacked body in a stacking direction.

A strain engineered material including a monolayer graphene sheet comprising an array of wrinkles induced by deformations in the graphene sheet, the deformations formed by a lattice of underlying nanostructures on a substrate. The lattice of nanostructures comprises rows of the nanostructures and each of the wrinkles comprise a ridge aligned on top of a different one of the rows and along an alignment direction defined by the rows. The deformations pattern a strain distribution in the graphene sheet that induces a periodically varying pseudo magnetic field distribution ranging between a positive value and a negative values, The periodically varying pseudo magnetic field distribution has field magnitude minima located parallel to and between the ridges and field magnitude maxima located near to and parallel to each of the ridges and can be designed for various valleytronic and spintronic device applications.

A magnetoresistance effect element includes: a laminate body including a first ferromagnetic layer, a second ferromagnetic layer, and a non-magnetic layer located between the first ferromagnetic layer and the second ferromagnetic layer; and a spin-orbit torque wiring connected to the laminate body. A second surface opposite to a first surface of the spin-orbit torque wiring in contact with the laminate body is curved in a first direction orthogonal to a direction in which the laminate body is laminated.

Provided are a memory device and a method of forming the same. The memory device includes: a selector; a magnetic tunnel junction (MTJ) structure, disposed on the selector; a spin orbit torque (SOT) layer, disposed between the selector and the MTJ structure, wherein the SOT layer has a sidewall aligned with a sidewall of the selector; a transistor, wherein the transistor has a drain electrically coupled to the MTJ structure; a word line, electrically coupled to a gate of the transistor; a bit line, electrically coupled to the SOT layer; a first source line, electrically coupled to a source of the transistor; and a second source line, electrically coupled to the selector, wherein the transistor is configured to control a write signal flowing between the bit line and the second source line, and control a read signal flowing between the bit line and the first source line.