A perpendicular spin orbit memory device includes a first electrode having a magnetic material and platinum and a material layer stack on a portion of the first electrode. The material layer stack includes a free magnet, a fixed magnet above the first electrode, a tunnel barrier between the free magnet and the fixed magnet and a second electrode coupled with the fixed magnet.

Methods of providing an air- and/or moisture-barrier coating on at least a portion of a two-dimensional material are described. In particular, the methods provide an improved approach for providing a doped two-dimensional material, preferably graphene, on a substrate wherein at least a portion of the two-dimensional material is coated with an air- and/or moisture-barrier coating that comprises an inorganic oxide, fluoride or sulfide. Two-dimensional materials provided with an air- and/or moisture impermeable inorganic oxide, fluoride or sulfide coating and an electronic device comprising the same are also described.

The present disclosure provides a magnetic random-access memory, comprising: an antiferromagnetic layer; a magnetic tunnel junction disposed on the antiferromagnetic layer and comprising a ferromagnetic layer disposed corresponding to the antiferromagnetic layer; wherein the ferromagnetic layer of the magnetic tunnel junction has in-plane magnetic anisotropy, and an exchange bias field is formed between the antiferromagnetic layer and the ferromagnetic layer by an annealing process. A direction of the exchange bias field is changed by a spin orbit torque, thereby changing a direction of a magnetic moment of the ferromagnetic layer and realizing data writing. The present disclosure can improve a thermal stability of the i-MTJ and reduce a lateral dimension of the i-MTJ, thereby improving a storage density of the magnetic memory.

According to an embodiment, there is provided an integrated device including: a substrate; and a laminated structure stacked on the substrate, in which the laminated structure includes a first element group and a second element group disposed at a position farther from the substrate than the first element group, each of the first element group and the second element group includes a plurality of domain wall movement elements, each of the plurality of domain wall movement elements includes a domain wall movement layer, a ferromagnetic layer, and a non-magnetic layer interposed between the domain wall movement layer and the ferromagnetic layer, and each of the domain wall movement elements belonging to the second element group has a lower critical current density required for moving a domain wall of the domain wall movement layer than each of the domain wall movement elements belonging to the first element group.

A spin-orbit torque type magnetization reversal element including a magnetoresistance effect element that comprises a first ferromagnetic layer, a non-magnetic layer and a second ferromagnetic layer which are laminated in this order; and a spin-orbit torque wiring that laminates on the magnetoresistance effect element; wherein a first surface of the spin-orbit torque wiring on the magnetoresistance effect element side is parallel to a plane orthogonal to a laminating direction, and a second surface opposite to the first surface is non-parallel to the plane perpendicular to the stacking direction.

A race track magnetic memory device includes a magnetic fine wire having a plurality of magnetic domains, a magnetic tunnel junction element comprising a pinned layer and an insulating layer, and a spin-orbit torque (SOT) generator. An easy axis of the magnetic fine wire is substantially perpendicular to a contact surface of the magnetic fine wire and the SOT generator. The magnetic tunnel junction element and the SOT generator are disposed on a magnetic domain write region of the magnetic fine wire. Data is written by generating spin-transfer torque at magnetization of the magnetic domain write region by flowing a first current in the magnetic tunnel junction element and by generating spin-orbit torque at the magnetization of the magnetic domain write region by flowing a second current in the SOT generator.

A magnetic memory device includes a magnetic tunnel junction (MTJ) stack, a spin-orbit torque (SOT) induction wiring disposed over the MTJ stack, a first terminal coupled to a first end of the SOT induction wiring, a second terminal coupled to a second end of the SOT induction wiring, and a shared selector layer coupled to the first terminal.

An apparatus is provided that includes a magnetic tunnel junction, a magnetic assist layer coupled to the magnetic tunnel junction, a non-magnetic layer disposed between the free layer and the magnetic assist layer, and a spin Hall effect layer coupled to the magnetic assist layer. The magnetic tunnel junction includes a free layer in a plane, the free layer including a switchable magnetization direction perpendicular to the plane. The magnetic assist layer includes a magnetization direction parallel to the plane and free to rotate about an axis perpendicular to the plane.

A semiconductor device includes first and second Hall-effect sensors. Each sensor has first and third opposite terminals and second and fourth opposite terminals. A control circuit is configured to direct a current through the first and second sensors and to measure a corresponding Hall voltage of the first and second sensors. Directing includes applying a first source voltage in a first direction between the first and third terminals of the first sensor and applying a second source voltage in a second direction between the first and third terminals of the second sensor. A third source voltage is applied in a third direction between the second and fourth terminals of the first sensor, and a fourth source voltage is applied in a fourth direction between the second and fourth terminals of the second sensor. The third direction is rotated clockwise from the first direction and the fourth direction rotated counter-clockwise from the second direction.

A semiconductor die is proposed, wherein the semiconductor die comprises a microelectronic section and a sensor section. The microelectronic section comprises an integrated circuit. The sensor section adjoins an edge of the semiconductor die. A sensor is also proposed, which comprises such a semiconductor die.