A method of forming a semiconductor memory device is disclosed. A top electrode layer is formed on the MTJ stack layer. A patterned buffer layer is formed to cover only the logic circuit region. A hard mask layer is formed on the top electrode layer and the patterned buffer layer. A patterned resist layer is formed on the hard mask layer. A first etching process is performed to etch the hard mask layer and the top electrode layer not covered by the patterned resist layer in the memory region and the hard mask layer, the patterned buffer layer and the top electrode layer in the logic circuit region, thereby forming a top electrode on the MTJ stack layer in the memory region and a remaining top electrode layer covering only the logic circuit region on the MTJ stack layer.

A memory cell comprising a first layer of magnetic metal; a Ruderman-Kittel-Kasuya-Yosida (RKKY) interaction spacer coupled to the first layer of magnetic metal; and a second layer of magnetic layer coupled to the RKKY spacer. The effective thickness of the RKKY spacer is changed by applied terahertz radiation resiling in changing the sign of RKKY interaction from a first sign of RKKY interaction to a second sign of RKKY interaction; thus, enabling an RKKY-tunable magnetic memory cell; wherein the first state of the memory corresponds to the first sign of RKKY interaction, and wherein the second state of the memory corresponds to the second sign of RKKY interaction.

The present invention is directed to a magnetic memory element including a magnetic free layer structure incorporating two magnetic free layers separated by a perpendicular enhancement layer (PEL) and having a variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure formed adjacent to the insulating tunnel junction layer opposite the magnetic free layer structure; an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure; and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. The magnetic reference layer structure includes first, second, and third magnetic reference layers separated by two PELs and having a first invariable magnetization direction substantially perpendicular to layer planes thereof. The magnetic fixed layer has a second invariable magnetization direction substantially opposite to the first invariable magnetization direction.

In one example in accordance with the present disclosure a device is described. The device includes at least two memristive cells. Each memristive cell includes a memristive element to store one component of a complex weight value. The device also includes a real input multiplier coupled to the memristive element to multiply an output signal of the memristive element with a real component of an input signal. An imaginary input multiplier of the device is coupled to the memristive element to multiply the output signal of the memristive element with an imaginary component of the input signal.

A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first liner on the MTJ; forming a second liner on the first liner; forming an inter-metal dielectric (IMD) layer on the MTJ, and forming a metal interconnection in the IMD layer, the second liner, and the first liner to electrically connect the MTJ. Preferably, the first liner and the second liner are made of different materials.

Structures for a non-volatile memory element and methods of forming a structure for a non-volatile memory element. The structure includes a non-volatile memory element having a magnetic-tunneling-junction layer stack. The magnetic-tunneling-junction layer stack has a fixed layer that includes a synthetic antiferromagnetic layer. The structure further includes a via positioned adjacent to the magnetic-tunneling-junction layer stack. The via is comprised of a magnetic material.

A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.

A magnetic element is provided. The magnetic element includes a free magnetization layer having a surface area that is approximately 1,600 nm2 or less, the free magnetization layer including a magnetization state that is configured to be changed; an insulation layer coupled to the free magnetization layer, the insulation layer including a non-magnetic material; and a magnetization fixing layer coupled to the insulation layer opposite the free magnetization layer, the magnetization fixing layer including a fixed magnetization so as to be capable of serving as a reference of the free magnetization layer.

A method of fabricating a semiconductor device includes forming a stack of film comprising an anti-ferromagnetic layer, the pin layer, a barrier layer, a free layer and a bottom electrode layer. The method also includes forming a first patterned hard mask over the anti-ferromagnetic layer, etching the anti-ferromagnetic layer and the pin layer by using the first patterned hard mask as a first etch mask, forming a first capping layer along sidewalls of the anti-ferromagnetic layer and the pin layer, etching the barrier layer and the free layer by using first patterned hard mask and the first capping layer as a second etch mask, forming a second capping layer over the first capping layer and extending along sidewalls of the barrier layer and the free layer, exposing the anti-ferromagnetic layer and forming a top electrode layer over the exposed anti-ferromagnetic layer.

A magnetic tunnel junction (MTJ) containing device is provided that includes an undercut conductive pedestal structure having a concave sidewall positioned between a bottom electrode and a MTJ pillar. The geometric nature of such a conductive pedestal structure makes the pedestal structure unlikely to be resputtered and deposited on a sidewall of the MTJ pillar, especially the sidewall of the tunnel barrier of the MTJ pillar. Thus, electrical shorts caused by depositing resputtered conductive metal particles on the sidewall of the tunnel barrier of the MTJ pillar are substantially reduced.