A photodetector including a substrate having a semiconductor material layer, such as a silicon-containing layer, and a germanium-based well embedded in the semiconductor material layer, where a gap is located between a lateral side surface of the germanium-based well and the surrounding semiconductor material layer. The gap between the lateral side surface of the germanium-based well and the surrounding semiconductor material layer may reduce the surface contact area between the germanium-containing material of the well and the surrounding semiconductor material, which may be a silicon-based material. The formation of the gap located between a lateral side surface of the germanium-based well and the surrounding semiconductor material layer may help minimize the formation of crystal defects, such as slips, in the germanium-based well, and thereby reduce the dark current and improve photodetector performance.

Described herein is a semiconductor structure, comprising: a drain region; a drift region comprised of a wide band gap material disposed over the drain region; and a channel structure disposed over the drift region. In some embodiments, the channel structure comprises: an optically active material disposed over the drift region, wherein the optically active material generates charge carriers in response to an optical signal; and a source region disposed over the optically active material, wherein in an off state charge carriers in the optically active material are depleted to turn off the semiconductor structure, and in an on state charge carriers in the optically active material conduct a current in the semiconductor structure when an electric field is applied across the source region and drain region, causing the current to substantially flow directly between the source region and the drain region.

A solar cell structure comprises a substrate including a front side and a back side. A first tunnel oxide layer, a first polycrystalline silicon layer, a first silicon nitride layer, and a plurality of first electrodes are sequentially formed on the front side of the substrate. A second tunnel oxide layer, a second polycrystalline silicon layer, a second silicon nitride layer, and a plurality of second electrodes are sequentially formed on the back side of the substrate.

A process for etching a substrate comprising polycrystalline silicon to form silicon nanostructures includes depositing metal on top of the substrate and contacting the metallized substrate with an etchant aqueous solution comprising about 2 to about 49 weight percent HF and an oxidizing agent.

In a thin film photoelectric conversion device fabricated by addition of a catalyst element with the use of a solid phase growth method, defects such as a short circuit or leakage of current are suppressed. A catalyst material which promotes crystallization of silicon is selectively added to a second silicon semiconductor layer formed over a first silicon semiconductor layer having one conductivity type, the second silicon semiconductor layer is partly crystallized by a heat treatment, a third silicon semiconductor layer having a conductivity type opposite to the one conductivity type is stacked, and element isolation is performed at a region in the second silicon semiconductor layer to which a catalyst material is not added, so that a left catalyst material is prevented from being diffused again, and defects such as a short circuit or leakage of current are suppressed.

A self-powered electronic system comprises a first chip (401) of single-crystalline semiconductor embedded in a second chip (302) of single-crystalline semiconductor shaped as a container bordered by ridges. The assembled chips are nested and form an electronic device assembled, in turn, in a slab of weakly p-doped low-grade silicon shaped as a container (330) bordered by ridges (331). The flat side (335) of the slab includes a heavily n-doped region (314) forming a pn-junction (315) with the p-type bulk. A metal-filled deep silicon via (350) through the p-type ridge (331) connects the n-region with the terminal (322) on the ridge surface as cathode of the photovoltaic cell with the p-region as anode. The voltage across the pn-junction serves as power source of the device.

Methods are provided for fabricating photovoltaic cell contacts, which include: providing a block copolymer layer above an electrical contact layer of the photovoltaic cell, the block copolymer layer being self-assembled by phase segregation to include multiple structures of a first polymer material surrounded, at least in part, by a second polymer material; selectively etching the block copolymer layer to remove the multiple structures, forming holes in the block copolymer layer; and using the holes in the block copolymer layer to facilitate providing electrical contacts between a light absorption layer of the photovoltaic cell and the electrical contact layer. For instance, the holes in the copolymer layer may be used in etching a passivation layer over the electrical contact layer to form nano-sized contact openings in the passivation layer to the contact layer. Once provided, the cell's light absorption material forms contacts extending through the contact openings in the passivation layer.

Systems for reducing dark current in a photodiode include a heater configured to heat a photodiode above room temperature. A reverse bias voltage source is configured to apply a reverse bias voltage to the heated photodiode to reduce a dark current generated by the photodiode.

Methods and systems for reducing dark current in a photodiode include heating a photodiode above room temperature. A reverse bias voltage is applied to the heated photodiode to reduce a dark current generated by the photodiode.

Embodiments relate to use of a particle accelerator beam to form thin films of material from a bulk substrate are described. In particular embodiments, a bulk substrate having a top surface is exposed to a beam of accelerated particles. In certain embodiments, this bulk substrate may comprise GaN; in other embodiments this bulk substrate may comprise (111) single crystal silicon. Then, a thin film or wafer of material is separated from the bulk substrate by performing a controlled cleaving process along a cleave region formed by particles implanted from the beam. In certain embodiments this separated material is incorporated directly into an optoelectronic device, for example a GaN film cleaved from GaN bulk material. In some embodiments, this separated material may be employed as a template for further growth of semiconductor materials (e.g. GaN) that are useful for optoelectronic devices.