Patent classifications
H10D48/50
Ultrasonic transducer and method of manufacturing the same
An ultrasonic transducer includes: a first electrode layer disposed on an upper substrate and a support; a second electrode layer which is disposed on a lower surface of the upper substrate and is separated from the first electrode layer; an upper electrode disposed on an upper surface of a membrane to contact an upper surface of the first electrode layer; a trench formed through the upper electrode, the membrane, the support, and the upper substrate; and a pad substrate disposed under the upper substrate and including bonding pads that electrically connect to the first and second electrode layers, respectively.
Semiconductor device and manufacturing method thereof
An object of the present invention is to suppress an error in the value detected by a pressure sensor, which may be caused when environmental temperature varies. A semiconductor substrate has a first conductivity type. A semiconductor layer is formed over a first surface of the semiconductor substrate. Each of resistance parts has a second conductivity type, and is formed in the semiconductor layer. The resistance parts are spaced apart from each other. A separation region is a region of the first conductivity type formed in the semiconductor layer, and electrically separates the resistance parts from each other. A depressed portion is formed in a second surface of the semiconductor substrate, and overlaps the resistance parts, when viewed planarly. The semiconductor layer is an epitaxial layer.
Sequential wafer bonding
Embodiments of a sensor device include a sensor substrate and a first cap substrate attached to the sensor substrate with a first bond material. The first bond material is arranged to define a first device cavity. A second cap substrate is attached to the sensor substrate with a second bond material. The second bond material is arranged to define a second device cavity. The second bond material has a lower bonding temperature than the first bond material. The second cap substrate is further secured to the sensor substrate by an adhesive material disposed between the sensor substrate and the second cap substrate.
MEMS DEVICE
A MEMS device including a fixed member and a movable member supported via a resilient body. The MEMS device includes an impact alleviation mechanism provided at a position where the movable member and the fixed member collide during operation. The impact alleviation mechanism includes a stopper provided to either the fixed member or the movable member and that protrude to be parallel between sides of the two members with at least one side edge fixed to the respective member. Moreover, the impact alleviation mechanism includes an elongate protruding member provided on the other of the fixed member and the movable member. The elongate protruding member and the stopper are configured such that as collision force increases between the movable member and the fixed member during operation, an abutment area of an outer edge position of the elongate protruding member approaches the fixed side edge of the stopper.
Semiconductor device
A semiconductor device includes: a channel; a gate structure on the channel; a first source/drain arranged at a first end of the channel and including a metal; a first tunable band-gap layer arranged between the channel and the first source/drain and having a band gap that changes according to stress; a first electrostrictive layer between the gate structure and the first tunable band-gap layer, the first electrostrictive layer having a property of being deformed based on and upon application of an electric field; and a second source/drain at a second end of the channel.
CONTACT ELECTRIFICATION EFFECT-BASED BACK GATE FIELD-EFFECT TRANSISTOR
The present invention provides a contact electrification effect-based back gate field-effect transistor. The back gate field-effect transistor includes: a conductive substrate; an insulating layer formed on a front face of the conductive substrate; a field-effect transistor assembly including: a channel layer, a drain and a source, and a gate; and a triboelectric nanogenerator assembly including: a static friction layer formed at a lower surface of the gate, a movable friction layer disposed opposite to the static friction layer and separated by a preset distance, and a second electro-conductive layer formed at an outside of the movable friction layer and being electrically connected to the source; wherein, the static friction layer and the movable friction layer are made of materials in different ratings in triboelectric series, and the static friction layer and the movable friction layer are switchable between a separated state and a contact state under the action of an external force.
ANGULAR SPEED DETECTION DEVICE
The purpose of the present invention is to provide an inertial force detection device that can more accurately detect faults in a temperature sensor. Provided is an inertial force detection device configured so that in a state where an oscillating body is made to oscillate in a first direction, the amount of displacement when the oscillating body is displaced in a second direction due to the generation of angular velocity is detected as angular velocity, wherein the inertial force detection device has a means for performing control so that the oscillating body enters a state of resonance in the first direction, a temperature detection means for detecting temperature, and a means for detecting faults in the temperature detection means, and outputs a plurality of signals, which indicate the fault detection results of the three means, continuously from a single signal wire.
Out-of plane travel restriction structures
The present disclosure includes structures and methods of forming structures for restricting out-of-plane travel. One example of forming such structures includes providing a first wafer 100, 220 comprising a bond layer of a particular thickness 101, 221 on a surface of a substrate material 105, 225, removing the bond layer 101, 221 in a first area 103-1, 103-2, 223 to expose the surface of the substrate material 105, 225, applying a mask to at least a portion of a remaining bond layer 109-1, 109-4, 229-1, 229-3 and a portion of the exposed surface of the substrate material in the first area 109-2, 109-3, 229-2 to form a second area exposed on the surface of the substrate material 105, 225, etching the second area to form a cavity 110, 230 in the substrate material 105, 225 and the bond layer 101, 221, and forming by the etching, in the cavity 110, 230, a structure 113-1, 113-2, 233 for restricting out-of-plane travel, where the structure 113-1, 113-2, 233 has a particular height from a bottom of the cavity 115, 235 determined by the particular thickness of the bond layer 101, 221.
Avalanche-rugged quasi-vertical HEMT
A semiconductor device includes a semiconductor body including first and second lateral surfaces. A first device region includes a drift region of a first conductivity type, and a drift current control region of a second conductivity type being spaced apart from the second lateral surface by the drift region. A second device region includes a barrier layer, and a buffer layer having a different band gap than the barrier layer so that a two-dimensional charge carrier gas channel arises along an interface between the buffer layer and the barrier layer. An electrically conductive substrate contact forms a low ohmic connection between the two-dimensional charge carrier gas channel and the drift region. A gate structure is configured to control a conduction state of the two-dimensional charge carrier gas. The drift current control region is configured to block a vertical current in the drift region via a space-charge region.
Avalanche-Rugged Quasi-Vertical HEMT
A semiconductor device includes a semiconductor body including first and second lateral surfaces. A first device region includes a drift region of a first conductivity type, and a drift current control region of a second conductivity type being spaced apart from the second lateral surface by the drift region. A second device region includes a barrier layer, and a buffer layer having a different band gap than the barrier layer so that a two-dimensional charge carrier gas channel arises along an interface between the buffer layer and the barrier layer. An electrically conductive substrate contact forms a low ohmic connection between the two-dimensional charge carrier gas channel and the drift region. A gate structure is configured to control a conduction state of the two-dimensional charge carrier gas. The drift current control region is configured to block a vertical current in the drift region via a space-charge region.