To provide a high-quality nitride semiconductor ensuring high emission efficiency of a light-emitting element fabricated. In the present invention, when obtaining a nitride semiconductor by sequentially stacking a one conductivity type nitride semiconductor part, a quantum well active layer structure part, and a another conductivity type nitride semiconductor part opposite the one conductivity type, the crystal is grown on a base having a nonpolar principal nitride surface, the one conductivity type nitride semiconductor part is formed by sequentially stacking a first nitride semiconductor layer and a second nitride semiconductor layer, and the second nitride semiconductor layer has a thickness of 400 nm to 20 m and has a nonpolar outermost surface. By virtue of selecting the above-described base for crystal growth, an electron and a hole, which are contributing to light emission, can be prevented from spatial separation based on the QCSE effect and efficient radiation is realized. Also, by setting the thickness of the second nitride semiconductor layer to an appropriate range, the nitride semiconductor surface can avoid having extremely severe unevenness.

Exemplary embodiments provide solid-state microscope (SSM) devices and methods for processing and using the SSM devices. The solid-state microscope devices can include a light emitter array having a plurality of light emitters with each light emitter individually addressable. During operation, each light emitter can be biased in one of three operating states including an emit state, a detect state, and an off state. The light emitter can include an LED (light emitting diode) including, but not limited to, a nanowire based LED or a planar LED to provide various desired image resolutions for the SSM devices. In an exemplary embodiment, for near-field microscopy, the resolution of the SSM microscope can be essentially defined by the pitch p, i.e., center-to-center spacing between two adjacent light emitters, of the light emitter array.

In at least one embodiment of the method, said method includes the following steps: A) producing radiation-active islands (4) having a semiconductor layer sequence (3) on a growth substrate (2), wherein the islands (4) each comprise at least one active zone (33) of the semiconductor layer sequence (3), and an average diameter of the islands (4), as viewed in a top view of the growth substrate, amounts to between 50 nm and 10 m inclusive, B) producing a separating layer (5) on a side of the islands (4) facing the growth substrate (2), wherein the separating layer (5) surrounds the islands (4) all around, as viewed in a top view of the growth substrate (2), C) attaching a carrier substrate (6) to a side of the islands (4) facing away from the growth substrate (2), and D) detaching the growth substrate (2) from the islands (4), wherein at least a part of the separating layer (5) is destroyed and/or at least temporarily softened during the detachment.

Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a p-type or n-type semiconductor structure is disclosed. The semiconductor structure has a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. The semiconductor structure changes in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.

A light-emitting diode (LED) package includes a light-emitting structure including a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer; an isolating insulation layer; a first connection electrode portion and a second connection electrode portion electrically connected to the first conductive-type semiconductor layer and the second conductive-type semiconductor layer, respectively; a first electrode pad and a second electrode pad electrically connected to the first connection electrode portion and the second connection electrode portion, respectively; a first molding resin layer provided between the first electrode pad and the second electrode pad; a first pillar electrode and a second pillar electrode electrically connected to the first electrode pad and the second electrode pad, respectively; and a second molding resin layer provided on the first molding resin layer, the first electrode pad, and the second electrode pad, and between the first pillar electrode and the second pillar electrode.

An optical semiconductor device comprises, on a substrate, a fin of diamond-cubic semiconductor material and, at the base of the fin, a slab of that semiconductor material, in a diamond-hexagonal structure, that extends over the full width of the fin, the slab being configured as an optically active material. This semiconductor material can contain silicon. A method for manufacturing the optical semiconductor device comprises annealing the sidewalls of the fin, thereby inducing a stress gradient along the width of the fin.

In one example, a device includes a trench formed in a substrate. The trench includes a first end and a second end that are non-collinear. A first plurality of semiconductor pillars is positioned near the first end of the trench and includes integrated light sources. A second plurality of semiconductor pillars is positioned near the second end of the trench and includes integrated photodetectors.

In one example, a device includes a trench formed in a substrate. The trench includes a first end and a second end that are non-collinear. A first plurality of semiconductor pillars is positioned near the first end of the trench and includes integrated light sources. A second plurality of semiconductor pillars is positioned near the second end of the trench and includes integrated photodetectors.

A semiconductor device, such as an LED, includes a plurality of first conductivity type semiconductor nanowire cores located over a support, a continuous second conductivity type semiconductor layer extending over and around the cores, a plurality of interstitial voids located in the second conductivity type semiconductor layer and extending between the cores, and first electrode layer that contacts the second conductivity type semiconductor layer.

A method for growing on a substrate strongly aligned uniform cross-section semiconductor composite nanocolumns is disclosed. The method includes: (a) forming faceted pyramidal pits on the substrate surface; (b) initiating nucleation on the facets of the pits; and; (c) promoting the growth of nuclei toward the center of the pits where they coalesce with twinning and grow afterwards together as composite nanocolumns. Multi-quantum-well, core-shell nanocolumn heterostructures can be grown on the sidewalls of the nanocolumns. Furthermore, a continuous semiconductor epitaxial layer can be formed through the overgrowth of the nanocolumns to facilitate fabrication of high-quality planar device structures or for light emitting structures.