H10H20/818

Direct Growth Of Optoelectronic Devices On CMOS Technology

With an increasing demand for miniature low power sensors, there is a need to integrate optoelectronic devices with CMOS technology. Deposition of GaAs nanowires on polycrystalline conductive films allows for direct integration of optoelectronic devices on dissimilar materials. Nanowire growth is demonstrated on oxide and metallic films. Introducing dopant elements modifies the surface energy improving nanowire morphology and lowing for core-shell growth. Electrical measurements confirm that the metal-semiconductor junction is Ohmic and thus the feasibility of integrating nanowire-based devices directly on CMOS devices.

OPTOELECTRONIC DEVICE INCLUDING LIGHT-EMITTING DIODES AND A CONTROL CIRCUIT
20170133356 · 2017-05-11 · ·

An optoelectronic device including a first integrated circuit that includes: a substrate, having first and second opposite surfaces; and groups of sets of light-emitting diodes resting on the first surface. The integrated circuit also includes: in the substrate, first side elements for electrically insulating portions of the substrate around each set; and for each group on the second surface, at least one first conductive contact, connected to the first terminal of the group, and one second conductive contact, connected to the second terminal of the group. The device includes a second integrated circuit containing: third and fourth opposite surfaces; and third conductive contacts, located on the third surface and electrically connected to the first and second conductive contacts. The first integrated circuit is attached onto the third surface of the second integrated circuit.

LIGHT EMITTING DEVICE INCLUDING SEMICONDUCTOR NANOCRYSTALS

A light emitting device includes a semiconductor nanocrystal and a charge transporting layer that includes an inorganic material. The charge transporting layer can be a hole or electron transporting layer. The inorganic material can be an inorganic semiconductor.

METHOD AND APPARATUS FOR PROGRAMMABLE AND CONFIGURABLE SECTOR LOCALIZATION IN DISTRIBUTED ANTENNA SYSTEM

An apparatus for implementing an adaptive sectorization in a DAS (Distributed Antenna System) is provided. In some embodiment of the present disclosure, a DAS that supports an adaptive sectorization has the flexibility of supporting multiple sectors simply with an extension of STM (Sectorization Module) without being affected by the hardware structure. Where no sector splitting is needed, the STM is replaced by a COM (Head-end Combining Module) to provide a simple structure for supporting the sectors.

Insulating layer for planarization and definition of the active region of a nanowire device
09640723 · 2017-05-02 · ·

Various embodiments include methods of fabricating a semiconductor device that include forming a plurality of nanowires on a support, wherein each nanowire comprises a first conductivity type semiconductor core and a second conductivity type semiconductor shell over the core, forming an insulating material layer over at least a portion of the plurality of nanowires such that at least a portion of the insulating material layer provides a substantially planar top surface, removing a portion of the insulating material layer to define an active region of nanowires, and forming an electrical contact over the substantially planar top surface of the insulating material layer.

Optical semiconductor device and method for making the device

An optical semiconductor device comprises, on a substrate, a fin of diamond-cubic semiconductor material and, at the base of the fin, a slab of that semiconductor material, in a diamond-hexagonal structure, that extends over the full width of the fin, the slab being configured as an optically active material. This semiconductor material can contain silicon. A method for manufacturing the optical semiconductor device comprises annealing the sidewalls of the fin, thereby inducing a stress gradient along the width of the fin.

LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING LIGHT EMITTING DEVICE

A method for manufacturing a light emitting device includes a) forming a first light confinement layer having a plurality of openings on or above one main surface of an oriented polycrystalline substrate, said oriented polycrystalline substrate including a plurality of oriented crystal grains; b) stacking an n-type layer, an active layer, and a p-type layer; c) forming a second light confinement layer on said first light confinement layer so that said second light confinement layer covers said plurality of first columnar structures and said second columnar structure; d) forming a transparent conductive film on said second light confinement layer; e) forming a pad electrode on said transparent conductive film; and f) forming a cathode electrode electrically connected to ends of said plurality of first columnar structures closer to said oriented polycrystalline substrate.

Optoelectronic device comprising nanostructures of hexagonal type crystals

An optoelectronic device comprising: a first conductive layer, a second conductive layer, an active layer between the first conductive layer and the second conductive layer, wherein the active layer comprises a submicrometer size structure of hexagonal type crystals of an element or alloy of elements selected from the carbon group.

Methods of fabricating micro- and nanostructure arrays and structures formed therefrom

Methods of fabricating micro- and nanostructures comprise top-down etching of lithographically patterned GaN layer to form an array of micro- or nanopillar structures, followed by selective growth of GaN shells over the pillar structures via selective epitaxy. Also provided are methods of forming micro- and nanodisk structures and microstructures formed from thereby.

SURFACE MORPHOLOGY OF NON-POLAR GALLIUM NITRIDE CONTAINING SUBSTRATES
20170092810 · 2017-03-30 ·

Optical devices such as LEDs and lasers are discloses. The devices include a non-polar gallium nitride substrate member having an off-axis non-polar oriented crystalline surface plane. The off-axis non-polar oriented crystalline surface plane can be up to about 0.6 degrees in a c-plane direction and up to about 20 degrees in a c-plane direction in certain embodiments. In certain embodiments, a gallium nitride containing epitaxial layer is formed overlying the off-axis non-polar oriented crystalline surface plane. In certain embodiments, devices include a surface region overlying the gallium nitride epitaxial layer that is substantially free of hillocks.