A method for producing a nitride semiconductor device. The method comprises providing a substrate made of a material other than a nitride semiconductor. The material has a hexagonal crystal structure. An upper face of the substrate has at least one flat section. The method further comprises growing a first nitride semiconductor layer on the upper face of the substrate. The first nitride semiconductor layer is made of monocrystalline AlN. The first nitride semiconductor layer has an upper face that is a +c plane. The first nitride semiconductor layer has a thickness in a range of 10 nm to 100 nm. The method further comprises growing a second nitride semiconductor layer on the upper face of the first nitride semiconductor layer. The second nitride semiconductor layer is made of In.sub.XAl.sub.YGa.sub.1-X-YN (0X, 0Y, X+Y<1). In an initial stage of growing the second nitride semiconductor layer, micronuclei are formed in multiple locations on the upper face of the first nitride semiconductor layer such that a plurality of upside-down hexagonal pyramid-shaped or upside-down hexagonal frustum-shaped recesses separate the micronuclei above the at least one flat section of the upper face of the substrate. After the initial stage of growing, further growth is performed to reduce a size of the recesses until the recesses are substantially eliminated. The further growth is performed such that the recesses are substantially eliminated before a thickness of the second nitride semiconductor layer grows to 800 nm. The second nitride semiconductor layer is grown to have an upper face with at least one flat section.

A semiconductor device, such as an LED, includes a plurality of first conductivity type semiconductor nanowire cores located over a support, a continuous second conductivity type semiconductor layer extending over and around the cores, a plurality of interstitial voids located in the second conductivity type semiconductor layer and extending between the cores, and first electrode layer that contacts the second conductivity type semiconductor layer.

There is provided a method for manufacturing a nanostructure semiconductor light emitting device, including: forming a mask having a plurality of openings on a base layer; growing a first conductivity-type semiconductor layer on exposed regions of the base layer such that the plurality of openings are filled, to form a plurality of nanocores; partially removing the mask such that side surfaces of the plurality of nanocores are exposed; heat-treating the plurality of nanocores after partially removing the mask; sequentially growing an active layer and a second conductivity-type semiconductor layer on surfaces of the plurality of nanocores to form a plurality of light emitting nanostructures, after the heat treatment; and planarizing upper parts of the plurality of light emitting nanostructures such that upper surfaces of the nanocores are exposed.

An light emitting diode includes an insulating substrate, a P-type semiconductor layer, a semiconductor carbon nanotube layer, an MgO layer, a functional dielectric layer, and a first electrode, and a second electrode. The P-type semiconductor layer is located on the insulating substrate. The semiconductor carbon nanotube layer is located on the P-type semiconductor layer. The MgO layer is located on the semiconductor carbon nanotube layer. The functional dielectric layer covers the MgO layer. The first electrode is electrically connected to the P-type semiconductor layer. The second electrode is electrically connected to the semiconductor carbon nanotube layer.

A light-emitting diode (LED) package includes a light-emitting structure including a first conductive-type semiconductor layer, an active layer, and a second conductive-type semiconductor layer; an isolating insulation layer; a first connection electrode portion and a second connection electrode portion electrically connected to the first conductive-type semiconductor layer and the second conductive-type semiconductor layer, respectively; a first electrode pad and a second electrode pad electrically connected to the first connection electrode portion and the second connection electrode portion, respectively; a first molding resin layer provided between the first electrode pad and the second electrode pad; a first pillar electrode and a second pillar electrode electrically connected to the first electrode pad and the second electrode pad, respectively; and a second molding resin layer provided on the first molding resin layer, the first electrode pad, and the second electrode pad, and between the first pillar electrode and the second pillar electrode.

An optoelectronic device provided with a support including a face having at least one concave or convex portion, the amplitude of the sagitta of said portion being higher than 1/20th of the chord of the portion, and light-emitting diodes arranged on the portion, each light-emitting diode including a cylindrical, conical or frustoconical semiconductor element in contact with the portion, the amplitude of the sagitta of the contact surface between each semiconductor element and the portion being lower than or equal to 0.5 um.

A method for manufacturing at least one semiconductor structure, and a component including a structure formed with the method, the method including: providing a substrate including at least one semiconductor silicon surface; forming an amorphous silicon carbide layer in contact with at least one part of the semiconductor silicon surface; forming the at least one semiconductor structure in contact with the silicon carbide layer, the structure including at least one part, as a contact part, in contact with the surface of the silicon carbide layer, which includes gallium.

A nitride layer with embedded hole structure can be used for fabricating GaN-based LED of high external quantum efficiency through epitaxial growth. The approaches can have advantages such as reducing the complexity chip process for forming hole structure, reducing impacts from the chip process on chip reliability, effective reduction of hole structure size and increase of device stability, crush resistance, and reliability. A fabrication method of an underlayer structure with embedded micro-hole structure is also provided.

There is provided a semiconductor light emitting device 100 including a substructure 101, 120, 130 including at least one light emitting region R1 including a plurality of three-dimensional (3-D) light emitting nanostructures 140 and at least one electrode region R2, R3 including a plurality of locations CP2A, 17A, 17B, 18A, 18B wherein an arrangement of the plurality of three-dimensional (3-D) light emitting nanostructures 140 and the plurality of locations CP2A, 17A, 17B, 18A, 18B are identical.

In one example, a device includes a trench formed in a substrate. The trench includes a first end and a second end that are non-collinear. A first plurality of semiconductor pillars is positioned near the first end of the trench and includes integrated light sources. A second plurality of semiconductor pillars is positioned near the second end of the trench and includes integrated photodetectors.