An integrated circuit includes SOI-type MOS transistors on insulator, with a first well capable of being biased located under the insulator. The first wells are doped with a first conductivity type. Each first well includes, under the insulator of each transistor, a back gate region that is more heavily doped than the first well. The first wells are separated from each other by inclusion in in a second well that is also capable of being biased. The second well is doped with a second conductivity type.

A thin film transistor substrate includes a substrate, a data line disposed on the substrate and which extends substantially in a predetermined direction, a light blocking layer disposed on the substrate and including a metal oxide including zinc manganese oxide, zinc cadmium oxide, zinc phosphorus oxide or zinc tin oxide, a gate electrode disposed on the light blocking layer, a signal electrode including a source electrode and a drain electrode spaced apart from the source electrode, where the source electrode is connected to the data line, and a semiconductor pattern disposed between the source electrode and the drain electrode.

A change in electrical characteristics is inhibited and reliability is improved in a semiconductor device using a transistor including an oxide semiconductor. One embodiment of a semiconductor device including a transistor includes a gate electrode, first and second insulating films over the gate electrode, an oxide semiconductor film over the second insulating film, and source and drain electrodes electrically connected to the oxide semiconductor film. A third insulating film is provided over the transistor and a fourth insulating film is provided over the third insulating film. The third insulating film includes oxygen. The fourth insulating film includes nitrogen. The amount of oxygen released from the third insulating film is 110.sup.19/cm.sup.3 or more by thermal desorption spectroscopy, which is estimated as oxygen molecules. The amount of oxygen molecules released from the fourth insulating film is less than 110.sup.19/cm.sup.3.

The present disclosure relates to the field of display technology. Disclosed is an array substrate including: a plurality of gate lines, a plurality of data lines, and an array of pixels defined by intersections of the plurality of gate lines and the plurality of data lines, wherein, pixels in the array of pixels are arranged inclinedly along an inclination direction, making an angle with a rim of the array substrate, in which the angle is greater than 0 but is less than 90, and, being consistent with a rectilinear direction along which the gate lines or the data lines are. The pixel is in a shape of parallelogram, and a rectilinear direction along which a pair of opposite sides of the parallelogram are is consistent with the inclination direction. A display panel and a display apparatus including the abovementioned array substrate are also disclosed.

Systems, methods, and apparatus for an improved body tie construction that produces all the benefits of conventional body tie (H-gate, T-gate), without the limitations and degradations associated with those constructions are described. The improved body tie construction is configured to have a lower resistance body tie when the transistor is off (Vg approximately 0 volts). When the transistor is on (Vg>Vt), the resistance to the body tie is much higher, reducing the loss of performance associated with presence of body tie.

A flat display panel and manufacturing method are disclosed. The flat display panel includes a first substrate, a second substrate disposed oppositely to the first substrate. The second substrate is provided with a material layer having multiple concave slots. Multiple spacers are disposed on the first substrate and facing toward the second substrate. Wherein, multiple spacers include multiple main spacers and auxiliary spacers. The multiple auxiliary spacers respectively face toward regions which the multiple concave slots are located on, and the multiple main spacers respectively face toward regions which the multiple concave slots are not located on. A height of each main spacer and a height of each auxiliary spacer are the same such that when the flat display panel is not pressed, supporting the flat display panel through the main spacers, and when the flat display panel is pressed, further supporting the flat display panel through the auxiliary spacers.

Methods and apparatus for use in the manufacture of a display device including pixels. Each pixel includes a plurality of sub-pixels, each sub-pixel configured to provide light of a given wavelength. The method may include: performing, using a pick up tool (PUT), a first placement cycle comprising picking up first light emitting diode (LED) dies, and placing a first LED die on a substrate of the display device at a location corresponding to a sub-pixel the display device. The method further includes performing one or more subsequent placement cycles comprising picking up a second LED die, and placing the second LED die on the substrate of the display device at a second location corresponding to the sub-pixel of the display device. Multiple first and second LED dies may be picked and placed during each placement cycle to populate each pixel of the display device to provide redundancy of LED dies at each sub-pixel.

A curved display apparatus includes a curved display panel, a driver, a controller and a plurality of flexible substrates. The curved display panel extends in a tangential direction with respect to a first axis direction. The driver applies a driving signal to the curved display panel. The controller includes a curved printed circuit board extending in the tangential direction with respect to a first axis direction. The controller applies a control signal to the driver. The flexible substrates electrically connect the curved printed circuit board with the curved display panel. Each of the flexible substrates includes a first connection portion connected to the curved display panel, a second connection portion connected to the curved printed circuit board and a flexible substrate body connecting the first connection portion with the second connection portion. The flexible substrate body extends in a radial direction with respect to the first axis direction.

A display module substrate and a manufacturing method thereof are provided. The display module substrate includes a substrate body and a plurality of signal circuits. The substrate body has a supporting surface. The supporting surface includes a viewing area and a signal circuit area on one side of the viewing area. The signal circuits are disposed on the supporting surface and located at the signal circuit area. The signal circuit area has a plurality of apertures running through the substrate body, wherein the apertures are not shielded by the signal circuits. In a manufacturing thereof, the substrate body is disposed on a transparent carrier plate. When high-energy light is applied through the transparent carrier plate to etch a bottom surface of the substrate body to separate the substrate body and the transparent carrier plate, the resulting gas leaves through the apertures.

A manufacturing method of a semiconductor device comprises the steps of: providing a transparent substrate; forming a gate electrode on the transparent substrate; forming a gate insulation layer covering the gate electrode; forming an oxide semiconductor layer on the gate insulation layer and at least partially over the gate electrode; forming an etching stop layer over the gate electrode and at least covering a part of the oxide semiconductor layer, wherein the etching stop layer includes an opening; forming an electrode layer at the opening and on a part of the etching stop layer; and applying a low-resistance treatment to a part of the oxide semiconductor layer uncovered by the etching stop layer and the electrode layer to form a pixel electrode.