An electronic circuit device that includes a plurality of electrical circuits disposed on a support substrate, such as an electronic display device, includes one or more primary electrodes that extend along a trace on the support substrate, wherein the primary electrodes form one or more primary electrical pathways of or to one or more of the electrical circuits. One or more secondary electrodes are disposed along and in electrical contact with the primary electrodes. The secondary electrodes extend along the trace substantially parallel with the primary electrodes and form secondary electrical pathways adjacent the primary electrical pathways. The secondary electrodes are formed of a secondary conductor that is electrically conductive and has a higher strain limit than the primary electrodes. The secondary electrodes are able to handle a higher amount of strain than the primary electrode without breaking the secondary electrical pathway and thereby are arranged to complete the electrical circuits when a gap in a primary electrode interrupts the electrical circuit through the primary electrode.

A display device includes: a substrate; a polycrystalline silicon film on the substrate; and a first buffer film between the substrate and the polycrystalline silicon film and having one surface contacting the polycrystalline silicon film and another surface opposite to the one surface, wherein the one surface of the first buffer film has a first root mean square (RMS) roughness range, and the first RMS roughness range is 1.5 nm or less.

Provided is a display module including a glass substrate, a thin film transistor (TFT) layer provided on a front surface of the glass substrate, a driving circuit provided on a rear surface of the glass substrate and configured to drive the TFT layer, a plurality of light emitting diodes (LED) electrically connected to the TFT layer, a plurality of first connection pads provided at intervals in a portion of the front surface of the glass substrate and electrically connected to a TFT circuit provided in in the TFT layer, a plurality of second connection pads provided at intervals in a portion of the rear surface of the glass substrate and electrically connected to the driving circuit, and a plurality of side wirings extending from the lateral surface of the glass substrate to a portion of an insulating layer and extending to another portion of the insulating layer.

An array substrate includes a display area, and the array substrate includes an anti-cracking dam, a metal lead and a first data line, wherein the anti-cracking dam is arranged on a side of the array substrate and located in the display area, and the anti-cracking dam is arranged to surround a through-hole extending through the array substrate; the metal lead is arranged to at least partially surround the anti-cracking dam; the first data line includes a first section and a second section separated from each other by the through-hole; the first section of the first data line is connected to the first end of the metal lead, and the second section of the first data line is connected to the another end of the metal lead.

An electronic device is disclosed. The electronic device includes a substrate, a first conductive element disposed above the substrate, a transistor disposed above the first conductive element and the substrate, a first electronic unit disposed above the substrate and electrically connected to the transistor, a second electronic unit disposed above the substrate; and a connection electrode disposed above the first conductive element, the first conductive element is electrically connected to the first electronic unit and the second electronic unit through the connection electrode.

The present disclosure provides a pixel structure comprising a plurality of layers for providing a touch sensitive pixel of a sensing array. The layers comprising: a thin film transistor; and a conductive layer deposited on a dielectric shield to be touched by an object to be sensed and arranged to provide a capacitive sensing electrode coupled to the thin film transistor. The present disclosure also provides methods of manufacturing such a pixel structure.

There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size and/or utilize the side surface of an assembled flexible display.

The present application discloses a flexible array substrate comprising a flexible display portion comprising a plurality of first signal lines and a plurality of second signal lines intersecting each other; a flexible circuit bonding portion abutting the flexible display portion for bonding circuit parts; and a plurality of first connection lines for transmitting first signals to the plurality of first signal lines. Each of the plurality of first connection lines connects with a corresponding first signal line, and extends from the flexible display portion to the flexible circuit bonding portion. Each of the plurality of first connection lines crosses over at least one other first signal line within the flexible display portion.

There is provided a flexible display having a new wire structure and a new insulating layer structure. A flexible display includes a flexible substrate having a first area and a second area. The second area is curved in a non-zero angle relative to the plane of the first area. The flexible display further includes a plurality of wires that extend over from the first area to the second area of the flexible substrate. Each of the wires is covered by an upper insulating pattern, which is separated from other upper insulating pattern. Each upper insulating pattern covering the wire has substantially the same trace pattern shape of the corresponding wire thereunder. Accordingly, by adopting the above-described wire structure and upper insulating layer structure, crack generation and propagation in the wires and the insulating layers from bending of the flexible display can be minimized.

A method of providing a conducting structure over a substrate, which comprises: disposing a lower sub-layer over a substrate, the lower sub-layer comprising a conductive metal oxide material that includes indium and zinc, wherein the indium and zinc content in the bottom sub-layer substantially defines a first indium to zinc content ratio; performing a first hydrogen treatment over an exposed surface of the lower sub-layer for introducing hydrogen content therein; disposing a middle sub-layer over the lower sub-layer, the middle sub-layer comprising a metal material; disposing an upper sub-layer over the middle sub-layer, the upper sub-layer comprising a conductive metal oxide material that includes indium and zinc, wherein the indium and the zinc content in the upper sub-layer substantially defines a second indium to zinc content ratio smaller than the first indium to zinc content ratio; and patterning the multi-layered conductive structure to generate a composite lateral etch profile.