Patent classifications
H10F77/211
LIFTOFF PROCESS FOR EXFOLIATION OF THIN FILM PHOTOVOLTAIC DEVICES AND BACK CONTACT FORMATION
A method for forming a back contact on an absorber layer in a photovoltaic device includes forming a two dimensional material on a first substrate. An absorber layer including CuZnSnS(Se) (CZTSSe) is grown over the first substrate on the two dimensional material. A buffer layer is grown on the absorber layer on a side opposite the two dimensional material. The absorber layer is exfoliated from the two dimensional material to remove the first substrate from a backside of the absorber layer opposite the buffer layer. A back contact is deposited on the absorber layer.
AUTOMATED ASSEMBLY AND MOUNTING OF SOLAR CELLS ON SPACE PANELS
The present disclosure provides methods of fabricating a multijunction solar cell panel in which one or more of the steps are performed using an automated process. In some embodiments, the automated process uses machine vision.
SILICON HETEROJUNCTION PHOTOVOLTAIC DEVICE WITH WIDE BAND GAP EMITTER
A photovoltaic device including a single junction solar cell provided by an absorption layer of a type IV semiconductor material having a first conductivity, and an emitter layer of a type III-V semiconductor material having a second conductivity, wherein the type III-V semiconductor material has a thickness that is no greater than 50 nm.
SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME
A method for manufacturing a solar cell can include a tunnel layer forming step of forming a tunnel layer on a first surface of a semiconductor substrate, a first conductive type semiconductor region forming step of forming a first conductive type semiconductor region on the first surface of the semiconductor substrate, a second conductive type semiconductor region forming step of forming a second conductive type semiconductor region by doping impurities of a second conductive type into a second surface of the semiconductor substrate, a first passivation film forming step of forming a first passivation film on the first conductive type semiconductor region and an electrode forming step of forming a first electrode connected to the first conductive type semiconductor region and a second electrode connected to the second conductive type semiconductor region.
Method of forming electrode pattern and method of manufacturing solar cell
A method of forming an electrode pattern includes: forming, on a base material, a seed layer having a pattern corresponding to the electrode pattern; forming an organic material layer on the seed layer; producing an electrode layer transfer sheet by forming an electrode layer on the organic material layer via an electroplating process using the seed layer as a seed; disposing the electrode layer transfer sheet on a substrate on which the electrode pattern is to be formed such that the electrode layer is in contact with the substrate and pressure bonding the electrode layer to the substrate; and in a state in which the electrode layer is pressure bonded to the substrate, removing the base material along with the organic material layer and the seed layer to transfer the electrode layer to the substrate.
SCREEN PRINTING ELECTRICAL CONTACTS TO NANOSTRUCTURED AREAS
A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700 C, 750 C, 800 C, or 850 C.
Solar cell with reduced absorber thickness and reduced back surface recombination
Manufacture of an improved stacked-layered thin film solar cell. The solar cell has reduced absorber thickness and an improved back contact for Copper Indium Gallium Selenide solar cells. The back contact provides improved reflectance particularly for infrared wavelengths while still maintaining ohmic contact to the semiconductor absorber. This reflectance is achieved by producing a back contact having a highly reflecting metal separated from an absorbing layer with a dielectric layer.
BIFACIAL SOLAR CELL
A bifacial solar cell includes a substrate; an emitter portion formed on a first surface of the substrate; a first insulating layer formed on the emitter portion; a plurality of first electrodes contacting the emitter portion through the first insulating layer and extended in a first direction; a plurality of first current collectors extended in a second direction crossing the first direction, wherein the plurality of first current collectors are electrically and physically connected to the plurality of first electrodes; a second insulating layer formed on a second surface of the substrate; a back surface field formed on the second surface of the substrate, and having an impurity concentration that is higher than an impurity concentration of the substrate; a plurality of second electrodes contacting the back surface field through the second insulating layer and extended in the first direction; and a plurality of second current collectors extended in the second direction.
System and method for manufacturing photovoltaic structures with a metal seed layer
One embodiment of the present invention can provide a system for fabrication of a photovoltaic structure. The system can include a physical vapor deposition tool configured to sequentially deposit a transparent conductive oxide layer and a metallic layer on an emitter layer formed in a first surface of a Si substrate, without requiring the Si substrate to be removed from the physical vapor deposition tool after depositing the transparent conductive oxide layer. The system can further include an electroplating tool configured to plate a metallic grid on the metallic layer and a thermal annealing tool configured to anneal the transparent conductive oxide layer.
LEAD-FREE LOW-MELTING GLASS COMPOSITION, LOW-TEMPERATURE SEALING GLASS FRIT, LOW-TEMPERATURE SEALING GLASS PASTE, CONDUCTIVE MATERIAL, AND CONDUCTIVE GLASS PASTE CONTAINING GLASS COMPOSITION, AND GLASS-SEALED COMPONENT AND ELECTRIC/ELECTRONIC COMPONENT PREPARED USING THE SAME
An Ag.sub.2OV.sub.2O.sub.5TeO.sub.2 lead-free low-melting glass composition that is prevented or restrained from crystallization by heating so as to soften and flow more satisfactorily at a low temperature contains a principal component which includes a vanadium oxide, a tellurium oxide and a silver oxide; a secondary component which includes at least one selected from the group consisting of BaO, WO.sub.3 and P.sub.2O.sub.5; and an additional component which includes at least one selected from the group consisting of oxides of elements in Group 13 of periodic table. A total component of the principal component is 85 mole percent or more in terms of V.sub.2O.sub.5, T.sub.eO.sub.2 and Ag.sub.2O. Contents of TeO.sub.2 and Ag.sub.2O each is 1 to 2 times as much as a content of V.sub.2O.sub.5. A content of the secondary component is 0 to 13 mole percent. A content of the additional component is 0.1 to 3.0 mole percent.