Patent classifications
H04N5/347
Image sensor and control method thereof, and image capturing apparatus
An image sensor comprises: a plurality of pixels; a plurality of column output lines; and a control unit configured to control a signal to be output from pixels selected from the plurality of pixels to the plurality of column output lines, and each of the plurality of pixels includes: a photoelectric conversion portion; a floating diffusion portion for holding charge transferred from the photoelectric conversion portion; and an addition portion to add capacitance to the floating diffusion portion. The control unit controls to add the capacitance to the floating diffusion portion in a case where signals are simultaneously output to the same column line from the selected pixels.
Unit pixel of image sensor, image sensor, and computing system having the same
A unit pixel of an image sensor includes a charge generation unit, a signal generation unit, and a ground control transistor. The charge generation unit generates photo-charges in response to incident light and provides the photo-charges to a floating diffusion area in response to a transmission control signal. The signal generation unit generates an analog signal having a magnitude corresponding to an electrical potential of the floating diffusion area based on a reset control signal and a row selection signal. The ground control transistor is coupled between the floating diffusion area and a ground voltage, and is turned on in response to a ground control signal.
Image processing apparatus, image pickup apparatus, and image processing method for aberration correction
An image processing apparatus includes a determination unit (105) configured to determine a zooming direction, and a calculation unit (109) configured to calculate a correction coefficient for correcting aberration at a zoom position predicted from the zooming direction.
PARTIAL PIXEL BINNING FOR CIS
An image sensor includes a pixel array comprising a plurality of pixels, a color filter array comprising a plurality of color filter clusters overlying the pixel array, and readout circuitry configured to concurrently provide the pixels sharing the common filter cluster and having a first exposure time to a readout line for digital data conversion. Each of the color filter clusters includes a group of same color filters, and pixels sharing a common color filter cluster have different exposure times.
IMAGE SENSOR AND BINNING METHOD THEREOF
The binning method of an image sensor includes reading out a plurality of pixel signals from at least two rows of each of a plurality of areas of a pixel array at a time, each of the plurality of areas including a plurality of pixels arranged in a 2n×2n matrix, where n is an integer equal to or greater than 2; generating first image data by performing analog-to-digital conversion on the plurality of pixel signals; generating, based on the first image data, a first summation value of each of a plurality of binning areas based on two pixel values corresponding to a same color in each of the plurality of binning areas, the plurality of binning areas corresponding to the plurality of areas of the pixel array; and generating a second summation value of each of two binning areas based on two first summation values corresponding to a same color in the two binning areas, the two binning areas being adjacent to each other in a column direction among the plurality of binning areas.
PIXEL BINNING FOR HEXA-DECA RGBW COLOR FILTER ARRAYS
An image sensor includes a pixel array comprising a plurality of pixels, a color filter array comprising a plurality of color filter clusters overlying the pixel array, and readout circuitry configured to concurrently provide the pixels sharing the common filter cluster and having a first exposure time to a readout line for digital data conversion. Each of the color filter clusters includes a group of same color filters, and pixels sharing a common color filter cluster have different exposure times.
Image processing device, image processing method, and image processing system
To prevent generation of an invalid frame while suppressing power consumption. An image processing device including an ADC unit including a plurality of ADCs configured to convert a pixel signal read from an image sensor from an analog format to a digital format, and a selection unit configured to select the number of used ADCs, which is the number of ADCs used, among the plurality of ADCs on the basis of a decimation rate of pixels in reading of the pixel signal from the image sensor, in which the number of used ADCs and the decimation rate are switched such that a product of the number of used ADCs and the decimation rate is maintained to be a constant state.
SOLID-STATE IMAGING DEVICE AND IMAGING DEVICE
An imaging device includes at least one floating diffusion region, and a set of photoelectric conversion regions sharing the at least one floating diffusion region and that convert incident light into electric charges. The imaging device includes a first readout circuit and a second readout circuit. The first readout circuit is coupled to the at least one floating diffusion region and located at a first side of the set of photoelectric conversion region, and the second readout circuit is coupled to the at least one floating diffusion region. The second readout circuit includes a portion located at a second side of the set of photoelectric conversion regions that is opposite the first side, and the second readout circuit is configured to control the first readout circuit.
Electronic Devices Capable of Detecting Images in Low-Light Environment
An electronic device includes a reset circuit and a first image sensing circuit. The reset circuit is used to receive a reset signal and includes a plurality of transistors. The first image sensing circuit is coupled to the reset circuit and includes a photodiode, a first transistor and a second transistor. The photodiode has a first terminal. The first transistor has a first terminal coupled to the first terminal of the photodiode, and a second terminal. The second transistor has a first terminal coupled to the second terminal of the first transistor, and a second terminal configured to receive a row selection signal.
PIXEL ARRAY FOR REDUCING IMAGE INFORMATION LOSS AND IMAGE SENSOR INCLUDING THE SAME
A pixel array for reducing image information loss and an image sensor including the same are provided. The pixel array includes a plurality of color filter array (CFA) cells having a certain size and each including a plurality of CFA blocks in width and length directions of the CFA cell, wherein each of the CFA blocks includes a sub block, which is at a central region of each of the CFA blocks and includes m*n color pixels, and an outer region, which is other than the sub block and includes color pixels, wherein the m*n color pixels of the sub block include color pixels sensing first through third colors, and the outer region includes a relatively high number of first pixels sensing the first color and a relatively low number of second pixels sensing at least one selected from the second color and the third color.