A tool useful in the manufacture of a semiconductor is disclosed. A mold is providing having an interior defining a planar capillary space. A coating substantially covers at least the planar capillary space of the graphite member. The coating is substantially non-reactive to silicon at temperatures greater than approximately 1420 degrees Centigrade.

Approaches for foil-based metallization of solar cells and the resulting solar cells are described. For example, a method of fabricating a solar cell involves locating a metal foil above a plurality of alternating N-type and P-type semiconductor regions disposed in or above a substrate. The method also involves laser welding the metal foil to the alternating N-type and P-type semiconductor regions. The method also involves patterning the metal foil by laser ablating through at least a portion of the metal foil at regions in alignment with locations between the alternating N-type and P-type semiconductor regions. The laser welding and the patterning are performed at the same time.

Embodiments are directed to a coupler system having an interposer configured to couple optical signals. The interposer includes at least one optoelectronic component formed on a glass substrate. The interposer further includes at least one waveguide formed on the glass substrate and configured to couple the optical signals to or from the at least one optoelectronic component, wherein the at least one waveguide comprises a waveguide material having grain diameters greater than about one micron and an optical loss less than about one decibel per centimeter of optical propagation.

The present disclosure provides a double-sided passivated contact cell, where a front side and a rear side of the double-sided passivated contact cell each are provided with a tunnel layer, a doped polysilicon layer, and a passivation layer sequentially from an inside to an outside; and for the doped polysilicon layer at the front side and the doped polysilicon layer at the rear side, one of the doped polysilicon layer at the front side and the doped polysilicon layer at the rear side is a boron and carbon co-doped polysilicon layer, and the other of the doped polysilicon layer at the front side and the doped polysilicon layer at the rear side is a phosphorus and carbon co-doped polysilicon layer. The present disclosure further provides a preparation method of the double-sided passivated contact cell.

Disclosed is a method for preparing polycrystalline silicon ingot. The preparation method comprises: randomly laying seed crystals with unlimited crystal orientation at the bottom of crucible to form a layer of seed crystals and obtaining disordered crystalline orientations; providing molten silicon above the layer of seed crystals, controlling the temperature at the bottom of the crucible, making the layer of seed crystals not completely melted; controlling the temperature inside the crucible, making the molten silicon growing above the seed crystals, the molten silicon inheriting the structure of the seed crystals, then obtaining polycrystalline silicon ingot. By adopting the preparation method, a desirable initial nucleus can be obtained for a polycrystalline silicon ingot, so as to reduce dislocation multiplication during the growth of the polycrystalline silicon ingot.

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating a multi-purpose passivation and contact layer, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A P-type emitter region is disposed on the back surface of the substrate. An N-type emitter region is disposed in a trench formed in the back surface of the substrate. An N-type passivation layer is disposed on the N-type emitter region. A first conductive contact structure is electrically connected to the P-type emitter region. A second conductive contact structure is electrically connected to the N-type emitter region and is in direct contact with the N-type passivation layer.

The present disclosure enables high-volume cost effective production of three-dimensional thin film solar cell (3-D TFSC) substrates. Pyramid-like unit cell structures 16 and 50 enable epitaxial growth through an open pyramidal structure 3-D TFSC embodiments 70, 82, 100, and 110 may be combined as necessary. A basic 3-D TFSC having a substrate, emitter, oxidation on the emitter, and front and back metal contacts allows for simple processing. Other embodiments disclose a selective emitter, selective backside metal contacts, and front-side SiN ARC layers. Several processing methods, including process flows 150, 200, 250, 300, and 350, enable production of these 3-D TFSCs.

A method for forming a silicon layer using a liquid silane compound is described. The method includes the steps of: forming a first layer on a substrate, preferably a flexible substrate, the first layer having a (poly)silane; and, irradiating with light having one or more wavelength within the range between 200 and 400 nm for transforming the polysilane in silicon, preferably amorphous silicon or polysilicon.

A semiconductor template having a top surface aligned along a (100) crystallographic orientation plane and an inverted pyramidal cavity defined by a plurality of walls aligned along a (111) crystallographic orientation plane. A method for manufacturing a semiconductor template by selectively removing silicon material from a silicon template to form a top surface aligned along a (100) crystallographic plane of the silicon template and a plurality of walls defining an inverted pyramidal cavity each aligned along a (111) crystallographic plane of the silicon template.

A polycrystalline silicon column is provided. The polycrystalline silicon column includes a plurality of silicon grains grown along a crystal-growing direction. In the crystal-growing direction, the average grain size of the silicon grains and the resistivity of the polycrystalline silicon column have opposite variation in their trends, the average grain size of the silicon grains and the oxygen content of the polycrystalline silicon column have opposite variation in their trends, and the average grain size of the silicon grains and the defect area ratio of the polycrystalline silicon column have the same variation in their trends. The overall average defect area ratio of the polycrystalline silicon column is less than or equal to 2.5%.