An array substrate, a manufacturing method thereof, a display panel and a display device are disclosed. The manufacturing method includes: forming a first metal wiring, an interlayer insulating film, a second metal wiring and a protecting layer in sequence on a substrate, the second metal wiring is parallel with the first metal wiring and has an overlapped area therewith which is defined as a first zone, and portions of the first and second metal wiring except the first zone are defined as a second zone and a third zone respectively; at least thinning a portion of the interlayer insulating film and/or the protecting layer corresponding to the first zone while leaving portions except those corresponding to the first, second and third zones un-thinned. The manufacturing method can mitigate Zara mura.

A display device and a method for manufacturing the same are provided. The display device includes a first substrate, a second substrate and a light curable sealant. The first substrate has a displaying area and a non-displaying area, in which the displaying area includes a pixel array, and the non-displaying area includes a driving circuit. The driving circuit includes at least a capacitor which is made of transparent conductive material. The second substrate has an opaque area. The light curable sealant is located between the first substrate and the second substrate. When viewing from a normal vector of the first substrate or the second substrate, the light curable sealant, the capacitor and the opaque area are at least partially overlapped with each other.

A display panel and a manufacturing method thereof, and a display device is provided. The display panel includes a base substrate, and a light-shielding layer and a plurality of wires which are sequentially located on the base substrate in a direction away from the base substrate. The light-shielding layer includes a plurality of light-shielding structures. The display panel has a transparent display region. Orthographic projections of at least two wires located on the transparent display region on the base substrate are located within an orthographic projection of one light-shielding structure on the base substrate. The one light-shielding structure is configured to shield external light which is emitted to the at least two wires through the base substrate. It is conducive to reducing the influence of external light on the display effect of the display panel.

Provided is a display module including a glass substrate, a thin film transistor (TFT) layer provided on a front surface of the glass substrate, a driving circuit provided on a rear surface of the glass substrate and configured to drive the TFT layer, a plurality of light emitting diodes (LED) electrically connected to the TFT layer, a plurality of first connection pads provided at intervals in a portion of the front surface of the glass substrate and electrically connected to a TFT circuit provided in in the TFT layer, a plurality of second connection pads provided at intervals in a portion of the rear surface of the glass substrate and electrically connected to the driving circuit, and a plurality of side wirings extending from the lateral surface of the glass substrate to a portion of an insulating layer and extending to another portion of the insulating layer.

A method of manufacturing an array substrate includes: forming a first functional layer comprising a plurality of array substrate areas and connection areas between adjacent array substrate areas; forming a plurality of conductive portions within each of the array substrate areas, the plurality of conductive portions extending from a corresponding one of the array substrate areas to a corresponding one of the connection areas and terminals of the plurality of conductive portions being in connection with capacitor lines within the corresponding one of the connection areas such that two capacitor lines between two adjacent array substrate areas face each other and are formed into a first capacitor element; forming a plurality of second functional layers on the first functional layer formed with the plurality of conductive portions and the capacitor lines, for forming a plurality of array substrates; and performing a cutting process at the connection areas between adjacent array substrates and removing the capacitor lines between the adjacent array substrates so as to form a plurality of separate array substrates. The present disclosure further provides an array substrate manufactured by the method.

A semiconductor device including an oxide semiconductor and an organic resin film is manufactured in the following manner. Heat treatment is performed on a first substrate provided with an organic resin film over a transistor including an oxide semiconductor in a reduced pressure atmosphere; handling of the first substrate is performed in an atmosphere containing moisture as little as possible in an inert gas (e.g., nitrogen) atmosphere with a dew point of lower than or equal to 60 C., preferably with a dew point of lower than or equal to 75 C. without exposing the first substrate after the heat treatment to the air; and then, the first substrate is bonded to a second substrate that serves as an opposite substrate.

The present disclosure relates to a LTPS TFT unit for liquid crystal modules and the manufacturing method thereof. The manufacturing method includes: forming a SiNx layer on a glass substrate; forming a SiOx layer and an a-Si layer on the SiNx layer in sequence; scanning the a-Si layer by laser beams to remove hydrogen within the a-Si layer; adopting excimer laser to re-crystallization anneal the a-Si layer to form the polysilicon layer; forming a gate insulation layer on the polysilicon layer; forming a gate on the gate insulation layer; and forming a drain insulation layer on the gate.

A wiring having excellent electrical characteristics is provided. A wiring having stable electrical characteristics is provided. A device is manufactured through the steps of forming a first insulating film over a substrate, forming a second insulating film over the first insulating film, removing part of the first insulating film and part of the second insulating film to form a first opening, forming a first conductor in the first opening and over a top surface of the second insulating film, and forming a second conductor by planarizing a surface of the first conductor so as to remove part of the first conductor.

A semiconductor device includes a first insulating layer over a substrate, a first metal oxide layer over the first insulating layer, an oxide semiconductor layer over the first metal oxide layer, a second metal oxide layer over the oxide semiconductor layer, a gate insulating layer over the second metal oxide layer, a second insulating layer over the second metal oxide layer, and a gate electrode layer over the gate insulating layer. The gate insulating layer includes a region in contact with a side surface of the gate electrode layer. The second insulating layer includes a region in contact with the gate insulating layer. The oxide semiconductor layer includes first to third regions. The first region includes a region overlapping with the gate electrode layer. The second region, which is between the first and third regions, includes a region overlapping with the gate insulating layer or the second insulating layer. The second and third regions each include a region containing an element N (N is phosphorus, argon, or xenon).

The present invention provides a Z-inversion type display device comprising a gate line and a data line that intersect with each other to define a pixel area on a substrate, a thin film transistor that includes a gate electrode, a semiconductor layer, a source electrode and a drain electrode, and a pixel electrode that is formed in the pixel area, and is electrically connected to the drain electrode of the thin film transistor, wherein the drain electrode completely overlaps the gate line such that a drain electrode area is wholly included in a gate line area on a plan view.