A manufacturing method of an AMOLED backplane includes manufacturing a TFT substrate and forming a corrugation structure on the TFT substrate, which includes raised sections and recessed sections alternating each other; coating organic photoresist on the TFT substrate that includes the corrugation structure formed thereon to form a planarization layer in such a way that an upper surface of a portion of the planarization layer corresponding to and located above the corrugation structure includes a curved configuration corresponding to the corrugation structure; forming a pixel electrode on the planarization layer in such a way that the pixel electrode shows a curved configuration; and forming, in sequence, a pixel definition layer that has an opening to expose the curved configuration and a photo spacer on the pixel electrode and the planarization layer.

The present invention provides a method for manufacturing an LTPS TFT substrate structure and a structure of an LTPS TFT substrate. The method for manufacturing the LTPS TFT substrate structure according to the present invention provides patterns of a thermally conductive electrical-insulation layer that are of the same size and regularly distributed under a buffer layer of a driving TFT area to absorb heat in a subsequent excimer laser annealing process so as to speed up the cooling rate of amorphous silicon to form crystal nuclei that gradually grow up in the annealing process. Since the thermally conductive electrical-insulation layer is made up of regularly distributed and size-consistent patterns, crystal grains of a polycrystalline silicon layer located in the driving TFT area show improved consistency and homogeneity and the grain sizes are relatively large to ensure the consistency of electrical property of the driving TFT. The structure of the LTPS TFT substrate structure according to the present invention includes patterns of a thermally conductive electrical-insulation layer that are regularly distributed under a buffer layer of a driving TFT area and have the same size, so that crystal grains of a polycrystalline silicon layer located in the driving TFT area show improved consistency and homogeneity and the grain sizes are relatively large and thus, the electrical property of the driving TFT is consistent.

A display substrate includes a first switching element electrically connected to a gate line and that extends in a first direction and electrically connected to a data line that extends in a second direction crossing the first direction, an insulation layer disposed on the first switching element, a shielding electrode disposed on the insulation layer and a pixel electrode that partially overlap the shielding electrode. The shielding electrode includes a first portion that overlaps the data line and extends in the second direction and a second portion that overlaps the gate line and extends in the first direction.

A manufacturing method of flexible display panels, a flexible glass substrate, and a flexible display panel are disclosed. The manufacturing method of the flexible display panel includes: forming a TFT layer at one side of a flexible glass substrate; forming a polymer enhanced layer at the other side of the flexible glass substrate; curing the polymer enhanced layer; forming a display layer on the TFT layer; and forming an encapsulation layer on the side of the flexible glass substrate where the TFT layer is located. With such configuration, the compressive strength of the flexible glass substrate is enhanced so as to enhance the quality of products.

A method for manufacturing a semiconductor device is provided. The method comprises the steps of: providing a transparent substrate having a visible region and an invisible region; forming a gate and at least an alignment mark coplanarly on the transparent substrate, wherein the gate is located in the visible region and the alignment mark is located in the invisible region; forming a gate insulation layer to cover the gate and cover the alignment mark; forming an oxide semiconductor layer on the gate insulation layer above the gate; and forming an etching stop layer above the gate and the alignment mark.

A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

A manufacturing method of an array substrate includes: providing a first substrate; forming a gate line, a data line, and a thin-film transistor array on the first substrate; forming a pixel electrode on the thin-film transistor array; depositing and forming a first passivation layer on the pixel electrode, the data line, and the thin-film transistor array; forming a black matrix on the first passivation layer; and forming a common electrode on the black matrix and the first passivation layer. The black matrix has a size that completely covers at least the data line such that when the common electrode is formed on the black matrix and the first passivation layer, a portion of the common electrode that corresponds exactly to the data line is completely spaced from the data line by the black matrix and the first passivation layer.

A blue phase liquid crystal display panel and a method for manufacturing the same are disclosed. The blue phase liquid crystal display panel comprises a lower substrate and an upper substrate. A horizontal electric field between the two substrates can be strengthened while a vertical electric field between the two substrates can be weakened through arranging a pixel electrode and a common electrode on the upper substrate and the lower substrate as well as a first fringe electric field and a second fringe electric field generated therein respectively, so that a driving voltage of the blue phase liquid crystal can be reduced.

The present disclosure discloses a Thin Film Transistor array substrate, a method for manufacturing the same and a method for maintaining the same, and a display panel. The TFT array substrate includes: a substrate; gate lines, common electrode lines and data lines arranged on the substrate; and pixel electrodes arranged at pixel unit regions defined by the gate lines and the data lines. The TFT array substrate further includes weld metal electrically connected to the pixel electrodes. Projections of the weld metal onto the substrate and projections of target wires onto the substrate are overlapped at overlapping regions, and the target wires are the gate lines or the common electrode lines.

Certain electronic applications, such as OLED display back panels, require small islands of high-quality semiconductor material distributed over a large area. This area can exceed the areas of crystalline semiconductor wafers that can be fabricated using the traditional boule-based techniques. This specification provides a method of fabricating a crystalline island of an island material, the method comprising depositing particles of the island material abutting a substrate, heating the substrate and the particles of the island material to melt and fuse the particles to form a molten globule, and cooling the substrate and the molten globule to crystallize the molten globule, thereby securing the crystalline island of the island material to the substrate. The method can also be used to fabricate arrays of crystalline islands, distributed over a large area, potentially exceeding the areas of crystalline semiconductor wafers that can be fabricated using boule-based techniques.