Patent classifications
H04N5/363
Global shutter image sensor pixels having improved shutter efficiency
An image sensor may be provided with an array of image sensor pixels formed on a substrate having front and back surfaces. Each pixel may have a photodiode that receives light through the back surface, a floating diffusion node, a charge transfer gate, and first and second reset transistor gates. A source follower transistor may have a gate coupled to the floating diffusion node and a source coupled to an addressing transistor. The pixel may be coupled to a column feedback amplifier through the addressing transistor and a column feedback reset path. The amplifier may provide a kTC-reset noise compensation voltage to the reset transistors for storage on a holding capacitor coupled between the floating diffusion and a drain terminal of the source follower. The floating diffusion may be bounded at the front surface by the transfer gate, the reset gate, and p-type doped regions.
IMAGE SENSOR
An image sensor includes: a pixel chip provided with a plurality of pixels, a plurality of first transfer lines, and a plurality of capacitors; a circuit chip provided with a plurality of column reading circuits, a plurality of column scanning circuits, a second transfer line, and a constant current source; and a connection portion stacked and provided between the pixel chip and the circuit chip and configured to connect a capacitor, which is arranged in the pixel chip and has a trench structure, and a first transistor arranged in the circuit chip to each other via an electrode. The capacitor is configured to form a transfer capacity removing a noise included in an imaging signal and connect the pixel chip and the circuit chip to each other via the electrode and the connection portion.
OPTICAL SENSOR DEVICE AND METHOD FOR MANUFACTURING THE OPTICAL SENSOR DEVICE
An optical sensor device comprising a conversion region to convert an electromagnetic signal into photo-generated charge carriers is shown. The optical sensor device comprises a read-out node configured to read-out the photo-generated charge carriers and a control electrode which is separated by an isolating material from the conversion region. Furthermore, the optical sensor device comprises a doping region in the semiconductor substrate between the control electrode and the conversion region, wherein the doping region comprises a higher doping concentration compared to a minimum doping concentration of the conversion region, wherein the doping concentration is at least 1000 times higher than the minimum doping concentration of the conversion region and wherein the doping region extends into the semiconductor substrate. Moreover, a projection of the control electrode towards the conversion region overlaps the doping region or is located in the doping region. Embodiments show the optical sensor device as a time-of-flight sensor.
Pixel circuit with constant voltage biased photodiode and related imaging method
An imaging system includes a plurality of pixel circuits each having a photodiode, a biasing circuit and a charge-to-voltage converter. The photodiode is configured to generate charges in response to light or radiation. The biasing circuit is configured to provide a constant bias voltage across the photodiode so as to drain the charges generated by the photodiode. The charge-to-voltage converter is configured to accumulate the charges drained by the biasing circuit and convert the accumulated charges into a corresponding output voltage.
ANALOG-TO-DIGITAL CONVERTER AND OPERATING METHOD THEREOF
An analog-to-digital conversion method may include: generating an initial comparison signal by comparing a pixel signal of a comparison column to a pixel signal of an adjacent column; generating a control signal for selecting a ramp signal according to the generated initial comparison signal; and performing data conversion by comparing the ramp signal selected according to the generated control signal to a difference between adjacent first and second pixel signals.
BACKSIDE ILLUMINATED GLOBAL SHUTTER PIXEL WITH ACTIVE RESET
An image sensor may include an array of pixels arranged in rows and columns. The array of pixels may operate in a global shutter mode. Each pixel in the array of pixels may have a floating diffusion node for storing charge and may include an active reset circuit that acts as an inverting amplifier and that resets the floating diffusion node to a predetermined reference voltage, which eliminates the need for correlated double sampling readout. A sampling circuit may be coupled to the active reset circuit. The sampling circuit may sample and store signals that correspond to the amount of charge stored at the floating diffusion node. The sampling circuit may pass stored signals to a column sensing line through an amplifier. The amplifier may include a source follower transistor that provides proportional amplification to the stored signals and may include an active reset circuit for resetting the sampling circuit.
CORRELATED DOUBLE SAMPLING (CDS) CIRCUIT FOR DECREASING SETTLING TIME AND IMAGE SENSOR INCLUDING THE SAME
A correlated double sampling (CDS) circuit includes a comparator and a first circuit. The comparator including, a first input terminal, a second input terminal, at least one output terminal, and a plurality of first transistors operably coupled between the at least one output terminal and the first and second input terminals. The first circuit includes at least one second transistor, the at least one second transistor operably coupled to the at least one output terminal and one of the first input terminal and the second input terminal, the at least one second transistor having at least one of (i) a different number of layers than the first transistors, and (ii) a different dimension than the first transistors.
IMAGE SENSOR OPERATION FOR SHUTTER MODULATION AND HIGH DYNAMIC RANGE
An image sensor is operated for shutter modulation and high dynamic range, suitable for use with a local lamp. In one example, charge is collected at a photodetector of a photodetector circuit for a first duration for a first mini-exposure. The photodetector charge is transferred to a charge collection node of the photodetector circuit. A portion of the transferred charge is spilled from the charge collection node. Charge is collected at the photodetector for a second duration for a second mini-exposure. The second mini-exposure photodetector charge is transferred to the charge collection node after spilling the portion. The collected charge is read after transferring the second mini-exposure photodetector charge and the spilled portion of the charge is estimated and the spilled portion is added to the collected charge reading to obtain a total charge value for the combined exposures.
IMAGE SENSORS HAVING HIGH-EFFICIENCY CHARGE STORAGE CAPABILITIES
An image pixel may include a photodiode, storage node, floating diffusion, and capacitor. A first transistor may be coupled between the photodiode and the storage node. A second transistor may be coupled between the storage node and the floating diffusion. A third transistor may be coupled between the capacitor and the floating diffusion. A potential barrier may be formed between the storage node and the capacitor. The potential barrier may exhibit a potential that is between the potential of the photodiode and the potential of the charge storage node. The potential barrier may transfer an overflow portion of image charge from the storage node to the capacitor. The third transistor may transfer the overflow charge from the capacitor to the floating diffusion. The capacitor may shield the storage node from image light or may reflect at least some of the image light towards the photodiode.
SOLID-STATE IMAGE SENSOR AND IMAGE SENSING APPARATUS
Image sensor has pixel including photoelectric converter, pixel amplifier having input portion to receive signal from the photoelectric converter, and switch to connect reset terminal to the input portion. The sensor includes signal line to receive signal from the pixel amplifier, reset line connected to the reset terminal, and reset portion to reset voltage of the input portion. The reset portion includes capacitor to hold, in first period, second voltage appearing at the signal line in response to application of first voltage to the input portion, and supplier configured to set, in second period after the first period, the input portion to reset voltage via the switch by supplying third voltage corresponding to the second voltage held by the capacitor to the reset terminal via the reset line.