Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating a multi-purpose passivation and contact layer, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A P-type emitter region is disposed on the back surface of the substrate. An N-type emitter region is disposed in a trench formed in the back surface of the substrate. An N-type passivation layer is disposed on the N-type emitter region. A first conductive contact structure is electrically connected to the P-type emitter region. A second conductive contact structure is electrically connected to the N-type emitter region and is in direct contact with the N-type passivation layer.

A method for forming a silicon layer using a liquid silane compound is described. The method includes the steps of: forming a first layer on a substrate, preferably a flexible substrate, the first layer having a (poly)silane; and, irradiating with light having one or more wavelength within the range between 200 and 400 nm for transforming the polysilane in silicon, preferably amorphous silicon or polysilicon.

Provided is a solar cell comprising a photoelectric conversion unit on which textures are formed, and an electrode that includes a plurality of conductive particles. The average size of the textures is adjusted so that the diameter of an inscribed circle in a space surrounded by the ridgelines of a plurality of textures that are adjacent to each other in the textures and a virtual line that connects the vertices of the adjacent textures is smaller than the average particle size of the conductive particles.

A photovoltaic cell (1) including a first front collector layer (4), an amorphous silicon layer (6) on the first layer (4) and a second conductive layer (8) on the amorphous silicon layer (6). Electrical connection of the second conductive layer (8) to the first layer (4) is made through the amorphous silicon layer (6) at the periphery of the photovoltaic cell, the electrically conductive layer (8) comprising a positive peripheral bus (8), which is connected to the TCO first layer (4) and to at least one positive connection terminal at one end of the positive peripheral bus, and a negative peripheral bus, which is connected to a negative connection terminal, and the positive and negative peripheral buses being asymmetrical relative to one another, with the positive peripheral bus being longer than the negative peripheral bus.

Methods for fabricating busbar and finger metallization over TCO are disclosed. Rather than using expensive and relatively resistive silver paste, a high conductivity and relatively low cost copper is used. Methods for enabling the use of copper as busbar and fingers over a TCO are disclosed, providing good adhesion while preventing migration of the copper into the TCO. Also, provisions are made for easy soldering contacts to the copper busbars.

A method for forming contacts on a photovoltaic device includes forming a heterojunction cell including a substrate, a passivation layer and a doped layer and forming a transparent conductor on the cell. A patterned barrier layer is formed on the transparent conductor and has openings therein wherein the transparent conductor is exposed through the openings in the barrier layer. A conductive contact is grown through the openings in the patterned barrier layer by a selective plating process.

The present disclosure relates to a heterojunction solar cell, a manufacturing method thereof and a photovoltaic module. The heterojunction solar cell includes a substrate of a first conductivity type, a tunnel layer located on a light-receiving surface of the substrate, and a doped polysilicon layer located on a top surface of the tunnel layer. The doped polysilicon layer has the first conductivity type.

A laser processing system can be utilized to produce high-performance interdigitated back contact (IBC) solar cells. The laser processing system can be utilized to ablate, transfer material, and/or laser-dope or laser fire contacts. Laser ablation can be utilized to remove and pattern openings in a passivated or emitter layer. Laser transferring may then be utilized to transfer dopant and/or contact materials to the patterned openings, thereby forming an interdigitated finger pattern. The laser processing system may also be utilized to plate a conductive material on top of the transferred dopant or contact materials.

Silicon-based or other electronic circuitry is dissolved or otherwise disabled by reactive materials within a semiconductor chip should the chip or a device containing the chip be subjected to tampering. Triggering circuits containing normally-OFF heterojunction field-effect photo-transistors are configured to cause reactions of the reactive materials within the chips upon exposure to light. The normally-OFF heterojunction field-effect photo-transistors can be fabricated during back-end-of-line processing through the use of polysilicon channel material, amorphous hydrogenated silicon gate contacts, hydrogenated crystalline silicon source/drain contacts, or other materials that allow processing at low temperatures.

A back-contact Si thin-film solar cell includes a crystalline Si absorber layer and an emitter layer arranged on the crystalline Si absorber layer, which include a contact system being arranged on the back so as to collect excess charge carriers generated by the incidence of light in the absorber layer; a barrier layer having a layer thickness in a range of from 50 nm to 1 m formed on a glass substrate; at least one coating layer intended for optical coating and thin layer containing silicon and/or oxygen adjoining the crystalline Si absorber layer arranged on the at least one coating layer for improving the optical characteristics. The crystalline Si absorber layer can be produced by means of liquid-phase crystallization, is n-conducting, and has monocrystalline Si grains. An SiO2 passivation layer is formed between the layer containing silicon and/or oxygen and the Si absorber layer during the liquid-phase crystallization.