Photovoltaic devices with very high breakdown voltages are described herein. Typical commercial silicon photovoltaic devices have breakdown voltages below 50-100 volts (V). Even though such devices have bypass diodes to prevent photovoltaic cells from going into breakdown, the bypass diodes have high failure rates, leading to unreliable devices. A high-efficiency silicon photovoltaic cell is provided with very high breakdown voltages. By combining a device architecture with very low surface recombination and silicon wafers with high bulk resistivity (above 10 ohms centimeter (-cm)), embodiments described herein achieve breakdown voltages close to 1000 V. These photovoltaic cells with high breakdown voltages improve the reliability of photovoltaic devices, while reducing their design complexity and cost.

Embodiments of the present disclosure relate to a solar cell and a photovoltaic module. The solar cell includes a thin-film solar cell and a bottom cell stacked in a first direction. The bottom cell includes: a transparent conductive layer, a first doped conductive layer, an intrinsic amorphous silicon layer, a substrate, a second doped conductive layer, and one or more electrodes that are stacked in the first direction. The transparent conductive layer is between the thin-film solar cell and the first doped conductive layer, and the one or more electrodes are formed on a side of the second doped conductive layer away from the substrate, the one or more electrodes are in ohmic contact with the second doped conductive layer. The first doped conductive layer includes a doped amorphous silicon layer or a doped microcrystalline silicon layer.

Methods of fabricating solar cells using UV-curing of light-receiving surfaces of the solar cells, and the resulting solar cells, are described herein. In an example, a method of fabricating a solar cell includes forming a passivating dielectric layer on a light-receiving surface of a silicon substrate. The method also includes forming an anti-reflective coating (ARC) layer below the passivating dielectric layer. The method also includes exposing the ARC layer to ultra-violet (UV) radiation. The method also includes, subsequent to exposing the ARC layer to ultra-violet (UV) radiation, thermally annealing the ARC layer.

Aligned metallization approaches for fabricating solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a semiconductor layer over a semiconductor substrate. A first plurality of discrete openings is in the semiconductor layer and exposes corresponding discrete portions of the semiconductor substrate. A plurality of doped regions is in the semiconductor substrate and corresponds to the first plurality of discrete openings. An insulating layer is over the semiconductor layer and is in the first plurality of discrete openings. A second plurality of discrete openings is in the insulating layer and exposes corresponding portions of the plurality of doped regions. Each one of the second plurality of discrete openings is entirely within a perimeter of a corresponding one of the first plurality of discrete openings. A plurality of conductive contacts is in the second plurality of discrete openings and is on the plurality of doped regions.

A solar cell including: substrate having front and back surfaces, the back surface includes first, second and gap regions, the first and second regions are staggered and spaced from each other in a first direction, and each gap region is provided between adjacent first and second regions, first pyramidal texture structure regions are formed corresponding to gap regions and distance between top and bottom thereof is 2-4 m; first conductive layer formed over the first region; second conductive layer formed over the second region, the second conductive layer has conductivity type opposite to the first conductive layer; first electrode forming electrical contact with the first conductive layer; second electrode forming electrical contact with the second conductive layer; and boundary region between the gap region and the first and/or second conductive layer adjacent thereto, and the boundary region includes strip or line patterned texture structures arranged at intervals.

One embodiment of the present invention provides a solar module. The solar module includes a front-side cover, a back-side cover, and a plurality of solar cells situated between the front- and back-side covers. A respective solar cell includes a multi-layer semiconductor structure, a front-side electrode situated above the multi-layer semiconductor structure, and a back-side electrode situated below the multi-layer semiconductor structure. Each of the front-side and the back-side electrodes comprises a metal grid. A respective metal grid comprises a plurality of finger lines and a single busbar coupled to the finger lines. The single busbar is configured to collect current from the finger lines.

Methods for fabricating busbar and finger metallization over TCO are disclosed. Rather than using expensive and relatively resistive silver paste, a high conductivity and relatively low cost copper is used. Methods for enabling the use of copper as busbar and fingers over a TCO are disclosed, providing good adhesion while preventing migration of the copper into the TCO. Also, provisions are made for easy soldering contacts to the copper busbars.

A method for forming contacts on a photovoltaic device includes forming a heterojunction cell including a substrate, a passivation layer and a doped layer and forming a transparent conductor on the cell. A patterned barrier layer is formed on the transparent conductor and has openings therein wherein the transparent conductor is exposed through the openings in the barrier layer. A conductive contact is grown through the openings in the patterned barrier layer by a selective plating process.

Methods of fabricating solar cell emitter regions using ion implantation, and resulting solar cells, are described. In an example, a back contact solar cell includes a crystalline silicon substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region is disposed above the crystalline silicon substrate. The first polycrystalline silicon emitter region is doped with dopant impurity species of a first conductivity type and further includes ancillary impurity species different from the dopant impurity species of the first conductivity type. A second polycrystalline silicon emitter region is disposed above the crystalline silicon substrate and is adjacent to but separated from the first polycrystalline silicon emitter region. The second polycrystalline silicon emitter region is doped with dopant impurity species of a second, opposite, conductivity type. First and second conductive contact structures are electrically connected to the first and second polycrystalline silicon emitter regions, respectively.

A photovoltaic module capable of suppressing separation of a tab electrode can be obtained. The photovoltaic module includes a plurality of semiconductor layers including a photoelectric conversion layer, a plurality of photovoltaic elements including a finger electrode for collecting generated currents, formed on the semiconductor layers on a side of a light receiving surface, and a tab electrode for electrically connecting the plurality of photovoltaic elements, in which the tab electrode is electrically connected to the finger electrode in a region corresponding to a power generation region of the photovoltaic element and bonded on the light receiving surface through an insulating bonding material.