A semiconductor device includes: a connection terminal; a semiconductor chip having an electrode pad on one surface; a wire that connects the connection terminal and the electrode pad of the semiconductor chip; and transparent resin that covers the one surface of the semiconductor chip, and that seals the connection terminal and the wire, wherein: the wire includes a first bonded portion that is joined to the electrode pad, a second bonded portion that is joined to the connection terminal, and a loop portion that is formed so as to be continuous with the first bonded portion and has a turned back portion on a side opposite to the second bonded portion; and predetermined clearances are provided between the loop portion and the first bonded portion, and between the loop portion and other portions of the wire.

An ink jet process is used to deposit a material layer to a desired thickness. Layout data is converted to per-cell grayscale values, each representing ink volume to be locally delivered. The grayscale values are used to generate a halftone pattern to deliver variable ink volume (and thickness) to the substrate. The halftoning provides for a relatively continuous layer (e.g., without unintended gaps or holes) while providing for variable volume and, thus, contributes to variable ink/material buildup to achieve desired thickness. The ink is jetted as liquid or aerosol that suspends material used to form the material layer, for example, an organic material used to form an encapsulation layer for a flat panel device. The deposited layer is then cured or otherwise finished to complete the process.

An apparatus includes a package structure. The package structure includes a chip, a conductive structure over the chip, a molding structure surrounding and underneath the chip, and a first passivation layer over the conductive structure. The chip includes an optical component and a chip conductive pad. The conductive structure is electrically coupled to the chip conductive pad. The conductive structure has a planar portion substantially in parallel with an upper surface of the chip. The first passivation layer has a first opening defined therein. The first opening exposes a portion of the planar portion. The package structure is configured to receive an electrical coupling through the first opening in the first passivation layer.

A purpose of the present disclosure is to provide an optical unit that is capable of effectively sealing one or a plurality of optical devices even without a special material, a special structure, etc. In an optical unit of the present disclosure, the sealing section (50) includes: a circular seal section (51) surrounding one or a plurality of optical devices (40) on a wiring substrate from an in-plane direction of the wiring substrate; and an inside filling section (52) with which inside of the seal section (51) is filled and that seals the one or plurality of optical devices (40). The optical devices (40) are each a light emitting unit, a light receiving device, an image sensor, an X-ray sensor, or a power generating device. The seal section (51) and the inside filling section (52) are each configured of a cured thermosetting resin. The inside filling section (52) has light transmittance that is higher than light transmittance of the seal section (51). The inside filling section (52) has a modulus of elasticity that is smaller than a modulus of elasticity of the seal section (51).

An optoelectronic semiconductor component includes an optoelectronic semiconductor chip having a top area at a top side, a bottom area at an underside, and side areas connecting the top area and the bottom area; electrical contact locations at the top area or at the bottom area of the optoelectronic semiconductor chip; and an electrically insulating shaped body, wherein the optoelectronic semiconductor chip is a flip-chip having the electrical contract locations only at one side, either the underside or the top side, the shaped body surrounds the optoelectronic semiconductor chip at its side areas, and the shaped body is free of a via that electrically connects the optoelectronic semiconductor chip.

At least some embodiments of the present disclosure relate to a lid for covering an optical device. The lid includes a metal member and a transparent encapsulant. The metal member includes a top surface, a first bottom surface, and a second bottom surface between the top surface and the first bottom surface. The transparent encapsulant is surrounded by the metal member and covers at least a portion of the second bottom surface.

A semiconductor structure includes a silicon substrate, a protection layer, an electrical pad, an isolation layer, a redistribution layer, a conductive layer, a passivation layer, and a conductive structure. The silicon substrate has a concave region, a step structure, a tooth structure, a first surface, and a second surface opposite to the first surface. The step structure and the tooth structure surround the concave region. The step structure has a first oblique surface, a third surface, and a second oblique surface facing the concave region and connected in sequence. The protection layer is located on the first surface of the silicon substrate. The electrical pad is located in the protection layer and exposed through the concave region. The isolation layer is located on the first and second oblique surfaces, the second and third surfaces of the step structure, and the tooth structure.

Techniques are disclosed for providing an optical sensor that can be used for wind sensing and an optical scope. The optical sensor can include a photodiode, an electrical switch, a trans-impedance amplifier (TIA), and a capacitive trans-impedance amplifier (CTIA), enabling the optical sensor to perform both wind-sensing and range-finding functions. Some embodiments may include some or all of these components in an application-specific integrated circuit (ASIC), depending on desired functionality.

This invention relates to a method for producing an electrical system comprising a support (1) bearing on a first face at least one device; with the device comprising at least one electronic component (2) provided with at least one electrical connector (21, 22), with the method comprising: a step of setting in place of a cover (6) positioned above the component; said cover (6) comprising at least one passage (61, 62) according to a dimension in thickness of the cover (6) in such a way as to form an access space to the at least one electrical connector (21, 22), a step of forming a sealing seam (71) in such a way that the component is encapsulated in a sealed cavity (9) delimited by the first face of the support (1), the first face of the cover (6) and the sealing seam (7). The method comprises a step of filling with a conductive material of is at least one passage (61, 62) of the cover (6) in such a way as to establish an electrical continuity between the conductive material and the at least one electrical connector (21, 22), formant a tapping (81, 82) and in that the sealing seam (7) comprises a dielectric material.

An image sensing device includes an interconnect layer and a number of grid array contacts arranged on a bottom side of the interconnect layer. An image sensor integrated circuit (IC) is carried by the interconnect layer and has an image sensing surface. A number of electrical connections are coupled between the image sensor IC and an upper side of the interconnect layer. A transparent plate overlies the image sensing surface of the image sensor IC. A cap is carried by the interconnect layer and has an opening overlying transparent plate and the image sensing surface. The cap has an upper wall spaced above the interconnect layer and the image sensor IC to define an internal cavity and the cap defines an air vent coupled to the internal cavity.