A semiconductor device comprises a switching device and a cathode pad disposed in a semiconductor die and a termination structure disposed between the switching device and the cathode pad. The switching device comprises a first conduction terminal on a top surface of the semiconductor die, and a second conduction terminal disposed on a bottom surface of the semiconductor die. A drift layer of the semiconductor die may be disposed between the first and second conduction terminals. The cathode pad is disposed on the top surface and electrically connected to the drift layer, and corresponds to a cathode terminal of a diode having the first conduction terminal as an anode terminal. The diode operates as a free-wheeling diode for the switching device when the cathode pad is electrically coupled to the second conduction terminal. Accordingly, the semiconductor device may operate as a Reverse-Conducting Insulated Gate Transistor having reduced snapback.

A p-type semiconductor region formed in a front surface side of the semiconductor substrate. An n-type field stop (FS) region including protons as a donor is formed in a rear surface side of the semiconductor substrate. A concentration distribution of the donor in the FS region includes a first, second, third and fourth peaks in order from a front surface to the rear surface. A maximum point of peak concentration of the second peak is lower than a maximum point of peak concentration of the first peak.

A semiconductor device according to the present disclosure includes: a semiconductor substrate with a first main surface and a second main surface; a drift layer of a first conductivity type formed in the semiconductor substrate; a first impurity diffusion layer of a second conductivity type formed on the drift layer to be closer to the first main surface; and a buffer layer of the first conductivity type formed on the drift layer to be closer to the second main surface and higher in peak impurity concentration than the drift layer. The drift layer has a first trap, a second trap, and a third trap, whose energy level each is lower than energy at a bottom of a conduction band by 0.246 eV, 0.349 eV, and 0.470 eV. The second trap has trap density of equal to or greater than 2.010.sup.11 cm.sup.3.

In a semiconductor device, it is preferable to suppress a variation in characteristics of a temperature sensor. The semiconductor device is provided that includes a semiconductor substrate having a first conductivity type drift region, a transistor section provided in the semiconductor substrate, a diode section provided in the semiconductor substrate, a second conductivity type well region exposed at an upper surface of the semiconductor substrate, a temperature sensing unit that is adjacent to the diode section in top view and is provided above the well region, and an upper lifetime control region that is provided in the diode section, at the upper surface side of the semiconductor substrate, and in a region not overlapping with the temperature sensing unit in top view.

According to an aspect of the present disclosure, a semiconductor device includes a substrate including an IGBT region, and a diode region, a surface electrode provided on a top surface of the substrate and a back surface electrode provided on a back surface on an opposite side to the top surface of the substrate, wherein the diode region includes a first portion formed to be thinner than the IGBT region by the top surface of the substrate being recessed, and a second portion provided on one side of the first portion and thicker than the first portion.

A semiconductor device includes a semiconductor layer of a first conductivity type having a first principal surface on one side and a second principal surface on the other side, the semiconductor layer in which a device formation region and an outer region outside the device formation region are set, a channel region of a second conductivity type formed in a surface layer portion of the first principal surface of the semiconductor layer in the device formation region, an emitter region of a first conductivity type formed in a surface layer portion of the channel region, a gate electrode formed at the first principal surface of the semiconductor layer in the device formation region, the gate electrode facing the channel region across a gate insulating film, a collector region of a second conductivity type formed in a surface layer portion of the second principal surface of the semiconductor layer in the device formation region, an inner cathode region of a first conductivity type formed in the surface layer portion of the second principal surface of the semiconductor layer in the device formation region, and an outer cathode region of a first conductivity type formed in the surface layer portion of the second principal surface of the semiconductor layer in the outer region.

A semiconductor device includes first and second semiconductor layers of a first conductivity type, a third semiconductor layer of a second conductivity type, a plurality of electrodes, and a first insulating film. The second semiconductor layer is provided on the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer with a first surface at a side opposite to the first semiconductor layer. The electrodes extend from the first surface into the second semiconductor layer. A first insulating film provided between the second and third semiconductor layers and each of electrodes. The electrodes include first and second electrode groups. The first electrode group is arranged in one column in the first direction and apart from each other by a first distance. The first and second electrode groups are apart from each other by a second distance in the second direction.

A semiconductor device according to the present disclosure includes: a semiconductor substrate with a first main surface and a second main surface; a drift layer of a first conductivity type formed in the semiconductor substrate; a first impurity diffusion layer of a second conductivity type formed on the drift layer to be closer to the first main surface; and a buffer layer of the first conductivity type formed on the drift layer to be closer to the second main surface and higher in peak impurity concentration than the drift layer. The drift layer has a first trap, a second trap, and a third trap, whose energy level each is lower than energy at a bottom of a conduction band by 0.246 eV, 0.349 eV, and 0.470 eV. The second trap has trap density of equal to or greater than 2.010.sup.11 cm.sup.3.

A semiconductor device includes a transistor portion which includes a plurality of gate structure portions, and a diode portion which includes a cathode region in a lower surface of a semiconductor substrate. Each of the gate structure portions includes a gate trench portion, an emitter region of a first conductive type which is provided between an upper surface of the semiconductor substrate and a drift region to abut on the gate trench portion, and a base region of a second conductive type which is provided between the emitter region and the drift region to abut on the gate trench portion. A first threshold of the gate structure portion with a shortest distance to the cathode region in a top view is lower than a second threshold of the gate structure portion with a longest distance to the cathode region by 0.1 V or more and 1 V or less.

Provided is a semiconductor device comprising a semiconductor substrate that includes a transistor region; an emitter electrode that is provided on the semiconductor substrate; a first dummy trench portion that is provided on the transistor region of the semiconductor substrate and includes a dummy conducting portion that is electrically connected to the emitter electrode; and a first contact portion that is a partial region of the transistor region, provided between an end portion of a long portion of the first dummy trench portion and an end portion of the semiconductor substrate, and electrically connects the emitter electrode and a semiconductor region with a first conductivity type provided in the transistor region.