H01L39/14

ULTRA-THIN FILM SUPERCONDUCTING TAPES
20220246821 · 2022-08-04 ·

An ultra-thin film superconducting tape and method for fabricating same is disclosed. Embodiments are directed to a superconducting tape being fabricated by processes which include removing a portion of the superconducting tape's substrate subsequent the substrate's initial formation, whereby a thickness of the superconducting tape is reduced to 15-80 μm.

Fabrication of reinforced superconducting wires

In various embodiments, superconducting wires feature assemblies of clad composite filaments and/or stabilized composite filaments embedded within a wire matrix. The wires may include one or more stabilizing elements for improved mechanical properties.

Quality control of high performance superconductor tapes

A superconductor tape and method for manufacturing, measuring, monitoring, and controlling same are disclosed. Embodiments are directed to a superconductor tape which includes a superconductor film overlying a buffer layer which overlies a substrate. In one embodiment, the superconductor film is defined as having a c-axis lattice constant higher than 11.74 Angstroms. In another embodiment, the superconductor film comprises BaMO.sub.3, where M=Zr, Sn, Ta, Nb, Hf, or Ce, and which has a (101) peak of BaMO.sub.3 elongated along an axis that is between 60° to 90° from an axis of the (001) peaks of the superconductor film. These and other embodiments achieve well-aligned nanocolumnar defects and thus a high lift factor, which can result in superior critical current performance of the tape in, for example, high magnetic fields.

Magnetic resonance scanner with embedded quantum computer
11385308 · 2022-07-12 · ·

The present disclosure relates to a magnetic resonance (MR) scanner and magnetic resonance imaging (MRI) system. The MR scanner includes a superconducting magnet, a superconducting quantum processor, a first cooling system surrounding the superconducting magnet, and a second cooling system surrounding the superconducting quantum processor. The second cooling system is embedded in the first cooling system.

Superconductor ground plane patterning geometries that attract magnetic flux

Superconducting integrated circuit layouts are proofed against the detrimental effects of stray flux by designing and fabricating them to have one or more ground planes patterned in the x-y plane with a regular grid of low-aspect-ratio flux-trapping voids. The ground plane(s) can be globally patterned with such voids and thousands or more superconducting circuit devices and wires can thereafter be laid out so as not to intersect or come so close to the voids that the trapped flux would induce supercurrents in them, thus preventing undesirable coupling of flux into circuit elements. Sandwiching a wire layer between patterned ground planes permits wires to be laid out even closer to the voids. Voids of successively smaller maximum dimension can be concentrically stacked in pyramidal fashion in multiple ground plane layers having different superconductor transition temperatures, increasing the x-y area available for device placement and wire-up.

Photonic Quantum Networking for Large Superconducting Qubit Modules

In a general aspect, a photonic quantum network is disclosed. In some implementations, microwave modes and optical modes are generated on first and second quantum processing units (QPUs) by operation of a first transducer device of the first QPU and a second transducer device of the second QPU. The microwave modes are transmitted within the first and second QPUs from the first and second transducer devices to respective first and second qubit devices. The optical modes are transmitted from the first and second QPUs to an interferometer device. By operation of the interferometer device, output signals are generated on respective output channels based on the optical modes from the first and second QPUs. Based on the output signals detected by operation of photodetector devices coupled to the respective output channels, quantum entanglement transferred to the first and second qubit devices by the microwave modes is identified.

FLEXIBLE HTS CURRENT LEADS
20220084725 · 2022-03-17 ·

According to a first aspect, there is provide an HTS current lead. The HTS current lead comprises an HTS cable comprising a plurality of HTS tapes; a braided sleeve around the HTS cable; and a stabiliser material impregnating the HTS cable and the braided sleeve. The stabiliser material has a melting point above a critical temperature of the HTS tapes and below a thermal degradation temperature of the HTS tapes.

Second generation superconducting filaments and cable

A high-temperature superconducting filament and cable, and a method for manufacturing same. The substrate used to grow the superconducting layer is removed, and the exfoliated superconducting layer is coated with a protective layer, and then sliced into narrow strips. The strips are thereafter encapsulated with a conductive metal to provide a high-temperature superconducting filament. The filaments may be bundled together to provide a high-temperature superconducting cable.

Photodetector with superconductor nanowire transistor based on interlayer heat transfer
11283001 · 2022-03-22 · ·

A transistor includes (i) a first wire including a semiconducting component configured to operate in an on state at temperatures above a semiconducting threshold temperature and (ii) a second wire including a superconducting component configured to operate in a superconducting state while: a temperature of the superconducting component is below a superconducting threshold temperature and a first input current supplied to the superconducting component is below a current threshold. The semiconducting component is located adjacent to the superconducting component. In response to a first input voltage, the semiconducting component is configured to generate an electromagnetic field sufficient to lower the current threshold such that the first input current exceeds the lowered current threshold.

Enhanced superconducting transition temperature in electroplated Rhenium

This disclosure describes systems, methods, and apparatus for multilayer superconducting structures comprising electroplated Rhenium, where the Rhenium operates in a superconducting regime at or above 4.2 K, or above 1.8 K where specific temperatures and times of annealing have occurred. The structure can include at least a first conductive layer applied to a substrate, where the Rhenium layer is electroplated to the first layer. A third layer formed from the same or a different conductor as the first layer can be formed atop the Rhenium layer.