The present disclosure relates to a solid-state imaging device and an electronic device which efficiently capture incident light to improve sensitivity while maintaining the effect of suppressing noise generation. A memory is located on a side opposite from a light receiving surface and formed in the same substrate of Si as a photoelectric conversion element. The substrate including Si is defined by digging the Si deep from the light receiving surface, at a position where the memory is formed, and a bottom light-shielding film is formed at a bottom portion of the defined hole. The present disclosure is applicable to, for example, a stacked and back-illuminated solid-state imaging device.

A method for processing signals collected by pixels of a detector, each pixel being able to collect a signal under the effect of radiation to which the detector is subjected comprises: identifying a pixel, termed the affected pixel, generating a signal greater than a threshold, defining at least one adjacent pixel of the affected pixel, and, for each adjacent pixel: selecting a first comparison group associated with the affected pixel and a second comparison group associated with the adjacent pixel, the first and second comparison groups not comprising any pixel in common, comparing signals collected by each comparison group so as to determine the comparison group that has accumulated the most significant amount of signal.

An image sensor may include an array of image sensor pixels. Each image sensor pixel may have signal storage capabilities implemented through a write-back supply line and a control transistor for the supply line. Each image sensor pixel may output pixel values over column lines to switching circuitry. The switching circuitry may route the pixel values to signal processing circuitry. The signal processing circuitry may perform analog and/or digital processing operations utilizing analog circuits or pinned diode devices for image signal processing on the pixel values to output processed pixel values. The processing circuitry may send the processed pixel values back to the array. This allows the array to act as memory circuitry to support processing operations on processing circuitry in close proximity to the array. Configured this way, signal processing can be performed in close proximity to the array without having to move pixel signals to peripheral processing circuitry.

Imaging apparatus (2000, 2100, 2200) includes a photosensitive medium (2004, 2204) and an array of pixel circuits (302), which are arranged in a regular grid on a semiconductor substrate (2002) and define respective pixels (2006, 2106) of the apparatus. Pixel electrodes (2012, 2112, 2212) are connected respectively to the pixel circuits in the array and coupled to read out photocharge from respective areas of the photosensitive medium to the pixel circuits. The pixel electrodes in a peripheral region of the array are spatially offset, relative to the regular grid, in respective directions away from a center of the array.

The present invention provides a pixel circuit comprising a pinned photodiode, at least one first transfer gate for electrically connecting the pinned photodiode to at least one storage node and at least one further transfer gate. The at least one further gate can connect the at least one storage node with at least one floating diffusion node. At least one merging switch is included for allowing connection between the at least one floating diffusion node with one or more capacitor nodes, which can accept charge that exceeds the maximum storage capacity of the storage node.

An image sensor may have an array of pixels that include nested sub-pixels that each have at least one respective photodiode. An inner sub-pixel of a pixel with nested sub-pixels may have a relatively lower effective light collecting area compared to an outer sub-pixel of the pixel within which the inner sub-pixel is nested. A pixel circuit for the nested sub-pixels may include an overflow capacitor and/or a coupled gate circuit used to route charges from the photodiode in the inner sub-pixel. The lower light collecting area of the photodiode in the inner sub-pixel, with optional flicker mitigation charge routing from the coupled gates structure, may reduce the size of the capacitors required to capture photodiode and photodiode overflow charge responses. Flicker mitigation charge routing using a coupled gates structure may allow an adjustable proportion of the overflow charge to be stored in one or more storage capacitors.

A camera is configured with a disturbance correction engine that identifies and corrects disturbance introduced in image data when a filter is applied to the image data. The disturbance may take the form of overshoot noise, crosstalk noise, and/or low pass band energy. The disturbance correction engine determines an amount of energy deficit in the pass band and compensates for the deficit using the increase in energy in the side band. In operation, the disturbance correction engine processes the filtered image data in the frequency domain to adjust the amplitudes of the image coefficients. The adjusted image coefficients compensate for the deficit of energy in the pass band and also correct the disturbance caused by the overshoot and the crosstalk.

An image sensor includes a pixel array including a plurality of pixels, a row driver configured to control an operation of each of the plurality of pixels, a voltage supply line connected to a reset transistor included in each of the plurality of pixels, and a voltage supply circuit which detects a signal from the voltage supply line and supplies one of a first voltage and a second voltage to the voltage supply line based on the signal from the voltage supply line.

A plurality of pixels PX include effective pixels and optical black pixels. Signal lines VL are provided corresponding to each column of the pixels PX and supplied with output signals of the pixels PX of the corresponding column. Clip transistors CL are provided corresponding to the respective signal lines VL and limit a potential of the corresponding vertical signal lines VL based on a gate potential. At least in a predetermined operating mode, a potential Vclip_dark is supplied to a gate of one of the clip transistors CL corresponding to at least one pixel column formed of the optical black pixels when reading a noise level from the pixels PX corresponding to the clip transistors CL and when reading a data level from the pixels PX corresponding to the clip transistors CL.

A method of providing blooming protection to a CMOS imager having a pixel array of a plurality of pixels arranged in rows and columns, where the CMOS imager is operable to capture high dynamic range images using a rolling shutter, is provided. Such a method can include reading out charge accumulated by the pixels in a readout row of a first integration time, applying a reset to the readout row for a reset time sufficient to allow readout and reset to occur in at least one subsequent row, and starting a second integration time of the pixels in the readout row, wherein the second integration time is shorter than the first integration time, and wherein the at least one subsequent row is a sufficient number of rows to have a combined reset to preclude blooming effects from the pixel array during the second integration time.