Patent classifications
H10D30/023
Semiconductor device
A semiconductor device includes: a first multi-gate field effect transistor (FET) disposed over a substrate, the first multi-gate FET including a first active region; and a second multi-gate FET disposed over the first multi-gate FET, the second multi-gate FET including a second active region. The first active region and the second active region are not fully projected in a vertical direction perpendicular to the substrate.
Electronic device
An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The ring resonator is over the substrate and overlaps with the transistor. The ring resonator includes a conductive loop and an impedance matching element. The conductive loop includes a loop portion having two first parts and a second part and two feeding lines. Each of the first parts of the loop portion is between the second part of the loop portion and one of the feeding lines, and a tunnel barrier of the transistor is closer to the second part than to the feeding lines. The impedance matching element is closer to the feeding lines than to the second part.
TRANSISTOR STRUCTURE, AND SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREFOR
Disclosed are a transistor structure, and a semiconductor structure and manufacturing method therefor. The semiconductor structure includes a substrate and a word line structure. The substrate is provided with a plurality of active groups that are spaced apart and arranged in an array. Each active group includes two semiconductor pillars that are opposite to each other and separated by a separation trench. The word line structure includes one first word line and two second word lines, which are disposed corresponding to any one column of the active groups. The first word line is located within the separation trench, and the two second word lines are respectively located on sidewalls, facing away from the separation trench, of corresponding semiconductor pillars. The second word line and the first word line are offset in a direction perpendicular to the substrate.
Electronic device
An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The ring resonator is over the substrate and includes a conductive loop and an impedance matching element. The conductive loop overlaps with the transistor. The impedance matching element is on the conductive loop and electrically isolated from the transistor.
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
The present disclosure provides a semiconductor device and a method of fabricating the same. The semiconductor device includes: a substrate; a gate layer formed over the substrate, which includes a main gate and an extended gate spaced apart from each other; and an insulating dielectric layer formed on the substrate and connecting the main gate and the extended gate. The present disclosure allows the gate layer to function as desired while avoiding performance of the semiconductor device from being degraded due to the presence of parasitic capacitance.
Methods of integrating multiple gate dielectric transistors on a tri-gate (finfet) process
Two or more types of fin-based transistors having different gate structures and formed on a single integrated circuit are described. The gate structures for each type of transistor are distinguished at least by the thickness or composition of the gate dielectric layer(s) or the composition of the work function metal layer(s) in the gate electrode. Methods are also provided for fabricating an integrated circuit having at least two different types of fin-based transistors, where the transistor types are distinguished by the thickness and composition of the gate dielectric layer(s) and/or the thickness and composition of the work function metal in the gate electrode.
CMOS compatible BioFET
The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.
Method for manufacturing self-aligned exchange gates and associated semiconducting device
A method manufactures exchange gates from a starting structure including a substrate and, disposed on the substrate, a plurality of gate stacks, each gate stack including, a layer of a conductive or semiconductor material and a layer of a hard mask.
SPLIT-GATE STRUCTURE OF TRANSISTOR
Disclosed herein are devices and methods for forming split-gate transistors. In some embodiments, a method may include forming a high-k dielectric layer within a trench of a transistor, and forming a bottom electrode within a lower portion of the trench, wherein the bottom electrode is formed over the high-k dielectric layer. The method may further include forming a low-k dielectric layer over the bottom electrode, and forming a gate material over the low-k dielectric layer.
Gate-all-around/multi-gate semiconductor device with body contact, method of manufacturing gate-all-around/multi-gate semiconductor device with body contact, and electronic apparatus
Provided are a vertical semiconductor device with a body contact, a manufacturing method, and an electronic apparatus. The semiconductor device includes: an active region vertically disposed on a substrate relative to the substrate, including lower and upper source/drain regions, and a middle portion between the lower and upper source/drain regions for defining a channel region; first and second gate stacks which are disposed on first and second sides of the active region which are opposite to each other in a lateral direction relative to the substrate; and a body contact layer disposed on the second side of the active region to overlap a part of the middle portion of the active region, so as to apply a body bias to the active region, wherein the second gate stack includes first and second portions below and above the body contact layer respectively.