Disclosed is a semiconductor device including main and sub-transistors. The main transistor includes: a main channel layer; a main gate electrode located on the main channel layer; a main gate semiconductor layer located between the main channel layer and the main gate electrode; source and drain electrodes located on opposite sides of the main gate electrode and connected to the main channel layer; and a field dispersion layer located on the main channel layer, and located between the main gate and the drain electrodes. The sub-transistor includes: a sub-channel layer including a drift region having two-dimensional electron gas and including a first contact portion connected with the source electrode, a second contact portion connected with the field dispersion layer, and an extension portion connecting the first and second contact portions; and a sub-gate electrode located on the extension portion of the sub-channel layer and connected with the main gate electrode.

A semiconductor chip comprising a first junction field-effect transistor within a termination ring. A second junction field-effect transistor within the termination ring. An isolation region within the termination ring, wherein the isolation region separates the first junction field-effect transistor from the second junction field-effect transistor.

A nitride-based semiconductor circuit including a first semiconductor substrate, a second semiconductor substrate, a nitride-based heterostructure, connectors, a first patterned conductive layer, a second patterned conductive layer, and connecting vias is provided. The second substrate is disposed on the first substrate. The first substrate has first dopants, and the second substrate has second dopants, which is different from the first dopants, and a pn junction is formed between the first substrate and the second substrate. The nitride-based heterostructure is disposed on the second substrate. The connectors are disposed on the nitride-based heterostructure. The first and second patterned conductive layers are disposed on the connectors. The connecting vias include a first interconnection and a second interconnection. The first interconnection electrically connects the first substrate to one of the connectors. The second interconnection electrically connects the second substrate to another one of the connectors.

A complementary high electron mobility transistor includes an N-type HEMT and an P-type HEMT disposed on the substrate. The N-type HEMT includes a first undoped gallium nitride layer, a first quantum confinement channel, a first undoped group III-V nitride compound layer and an N-type group III-V nitride compound layer disposed from bottom to top. A first gate is disposed on the N-type group III-V nitride compound layer. A first source and a first drain are disposed at two sides of the first gate. The P-type HEMT includes a second undoped gallium nitride layer, a second quantum confinement channel, a second undoped group III-V nitride compound layer and a P-type group III-V nitride compound layer disposed from bottom to top. A second gate is disposed on the P-type group III-V nitride compound layer. A second source and a second drain are disposed at two sides of the second gate.

A semiconductor device includes a semiconductor layer on a first surface of a substrate with a first conductivity type, a drain electrode on a second surface of the substrate, first and second well regions in the semiconductor layer, a conductivity type of each of the first and second well regions being a second conductivity type, a doping region between the first and second well regions, a conductivity type of the doping region being the first conductivity type, and a pair of high electron mobility transistors on the semiconductor layer. Each of the first and second well regions includes a first portion adjacent to the source electrode, and a second portion adjacent to the first surface. A maximum distance between the first portions of the first and second well regions is longer than a maximum distance between the second portions of the first and second well regions.

A semiconductor structure includes a first semiconductor layer, a second semiconductor layer, multiple third semiconductor structures, a conductive layer, and an insulating layer. The first semiconductor layer is disposed over a substrate. The second semiconductor layer is disposed on the first semiconductor layer. The third semiconductor structures are disposed on the second semiconductor layer. The conductive layer is disposed over the third semiconductor structures. The insulating layer is disposed between the conductive layer and the third semiconductor structures to electrically isolate the conductive layer from the third semiconductor structures. A two-dimensional electron gas channel is formed in a portion of the first semiconductor layer, the portion of the first semiconductor layer is not overlapped with the third semiconductor structures in a vertical direction, and the two-dimensional electron gas channel is located near an interface between the first semiconductor layer and the second semiconductor layer.

Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a first transistor and a clamping device. The first nitride semiconductor layer is disposed on the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer. The first transistor is disposed on the second nitride semiconductor layer. The first transistor includes a first control electrode, a first current electrode and a second current electrode. The clamping device is disposed on the second nitride semiconductor layer and electrically coupled with the first transistor. The clamping device includes a second transistor and a third transistor electrically coupled with the second transistor. The clamping device is electrically coupled with the first current electrode and the second current electrode of the first transistor.