A variable capacitor is formed from a pair of electrodes and a dielectric interposed between the electrodes over a substrate, and an external input is detected by changing capacitance of the variable capacitor by a physical or electrical force. Specifically, a variable capacitor and a sense amplifier are provided over the same substrate, and the sense amplifier reads the change of capacitance of the variable capacitor and transmits a signal in accordance with the input to a control circuit.

It is an object of the present invention to provide a semiconductor device where, even in a case of stacking a plurality of semiconductor elements provided over a substrate, the stacked semiconductor elements can be electrically connected through the substrate, and a manufacturing method thereof. According to one feature of the present invention, a method for manufacturing a semiconductor device includes the steps of selectively forming a depression in an upper surface of a substrate or forming an opening which penetrates the upper surface through a back surface; forming an element group having a transistor so as to cover the upper surface of the substrate and the depression, or the opening; and exposing the element group formed in the depression or the opening by thinning the substrate from the back surface. A means for thinning the substrate can be performed by partially removing the substrate by performing grinding treatment, polishing treatment, etching by chemical treatment, or the like from the back surface of the substrate.

The invention relates to a structure for radiofrequency applications comprising: a monocrystalline substrate, a polycrystalline silicon layer directly on the monocrystalline substrate, and an active layer on the polycrystalline silicon layer intended to receive radiofrequency components. At least a first portion of the polycrystalline silicon layer extending from the interface of the polycrystalline silicon layer with the monocrystalline layer includes carbon and/or nitrogen atoms located at the grain boundaries of the polycrystalline silicon at a concentration of between 2% and 20%. A process for manufacturing such a structure includes, during deposition of at least a first portion of such a polycrystalline silicon layer located at the interface with the monocrystalline substrate, depositing carbon and/or atoms in the portion.

In a light emitting device, luminance irregularities caused by fluctuation in threshold of TFTs for supplying a current to EL elements among pixels hinder the light emitting device from improving the image quality. A voltage equal to the threshold of a TFT 110 is held in capacitor means 111 in advance. When a video signal is inputted from a source signal line, the voltage held in the capacitor means is added to the signal, which is then applied to a gate electrode of the TFT 110. Even when threshold is fluctuated among pixels, each threshold is held in the capacitor means 111 of each pixel, and therefore, influence of the threshold fluctuation can be removed. Since the threshold is stored in the capacitor means 111 alone and the voltage between two electrodes is not changed while a video signal is written, fluctuation in capacitance value has no influence.

Disclosed is a power storage element including a positive electrode current collector layer and a negative electrode current collector layer which are arranged on the same plane and can be formed through a simple process. The power storage element further includes a positive electrode active material layer on the positive electrode current collector layer; a negative electrode active material layer on the negative electrode current collector layer; and a solid electrolyte layer in contact with at least the positive electrode active material layer and the negative electrode active material layer. The positive electrode active material layer and the negative electrode active material layer are formed by oxidation treatment.

A display panel includes a first substrate structure, a second substrate structure and a display medium layer. The first substrate structure includes a first substrate, a transmitting line, a first protrusion structure and a second protrusion structure. The transmitting line, the first protrusion structure and the second protrusion structure are disposed on the first substrate. The second substrate structure includes a second substrate and a first spacer. The first spacer is disposed on the second substrate. The shape of a vertical projection of the first spacer projected on the first substrate is a polygonal shape having a first side, a second side, a third side, a first included angle and a second included angle. The first included angel is between the first side and the third side, and the first included angle is greater than 90 degrees. The second included angle is less than 90 degrees.

A thin-film integrated circuit comprising a first semiconductor device, a second semiconductor device, a first resistor, and a second resistor is provided. A semiconducting region of the first semiconductor device, a resistor body of the first resistor, a semiconducting region of the second semiconductor device, and a resistor body of the second resistor are formed from at least one of a first source material and a second source material, and a material of the resistor body of the first resistor and a material of the resistor body of the second resistor have different electrical properties.

A thin-film integrated circuit comprising a first semiconductor device, a second semiconductor device, a first resistor, and a second resistor is provided. A semiconducting region of the first semiconductor device, a resistor body of the first resistor, a semiconducting region of the second semiconductor device, and a resistor body of the second resistor are formed from at least one of a first source material and a second source material, and a material of the resistor body of the first resistor and a material of the resistor body of the second resistor have different electrical properties.

An integrated circuit (IC) is described. The IC includes a metal-oxide-metal (MOM) capacitor (MOMCAP). The MOMCAP includes a first terminal coupled to a first plurality of fingers of a first metal interconnect layer. The MOMCAP also includes a second terminal coupled to a second plurality of fingers of the first metal interconnect layer and interdigitated with the first plurality of fingers of the first metal interconnect layer. The IC also includes a first metal-oxide-semiconductor (MOS) capacitor (MOSCAP). The first MOSCAP includes a polysilicon terminal coupled to the first plurality of fingers of the MOMCAP. The first MOSCAP also includes a diffusion terminal coupled to the second plurality of fingers of the MOMCAP.

A semiconductor device including a first stacked nanosheet Field Effect Transistor (FET), a second stacked nanosheet, a metal insulator metal (MIM) capacitor between the first stacked nanosheet and the second stacked nanosheet and an insulator separating the MIM capacitor from each of the first stacked nanosheet and the second stacked nanosheet. An embodiment where the first stacked nanosheet and the second stacked nanosheet each include an upper stacked nanosheet and a lower stacked nanosheet, the upper stacked nanosheet and the lower stacked nanosheet each include alternating layers of a sacrificial material and a semiconductor channel material vertically aligned and stacked one on top of another. Forming a first stacked nanosheet, forming a second stacked nanosheet, forming a MIM capacitor between the first stacked nanosheet and the second stacked nanosheet and forming an insulator separating the MIM capacitor from each of the first stacked nanosheet and the second stacked nanosheet.