A method of manufacturing a semiconductor device includes: forming field electrode structures extending in a direction vertical to a first surface in a semiconductor body; forming cell mesas from portions of the semiconductor body between the field electrode structures, including body zones forming first pn junctions with a drift zone; forming gate structures between the field electrode structures and configured to control a current flow through the body zones; and forming auxiliary diode structures with a forward voltage lower than the first pn junctions and electrically connected in parallel with the first pn junctions, wherein semiconducting portions of the auxiliary diode structures are formed in the cell mesas.

A super junction MOSFET device including a semiconductor substrate; a base region provided on a primary surface side of the semiconductor substrate and having impurities of a first conductivity type; a source region that includes a portion of a frontmost surface of the base region and has impurities of a second conductivity type; a gate electrode that penetrates through the base region; a source electrode that is provided on the base region and is electrically connected to the source region; and a front surface region that is provided on an entirety of the frontmost surface of the base region in a region differing from a region where the source region and the gate electrode are provided in the base region, is electrically connected to the source electrode provided on the base region, and has a lower impurity concentration of impurities of the second conductivity type than the source region.

The present disclosure relates to a power module that has a housing with an interior chamber and a plurality of switch modules interconnected to facilitate switching power to a load. Each of the plurality of switch modules comprises at least one transistor and at least one diode mounted within the interior chamber and both the at least one transistor and the at least one diode are majority carrier devices, are formed of a wide bandgap material system, or both. The switching modules may be arranged in virtually any fashion depending on the application. For example, the switching modules may be arranged in a six-pack, full H-bridge, half H-bridge, single switch or the like.

A semiconductor device includes a wide-bandgap semiconductor substrate of a first conductivity type, a wide-bandgap semiconductor deposition layer of the first conductivity type, semiconductor regions of a second conductivity type, a wide-bandgap semiconductor layer of the second conductivity type, first regions of the first conductivity type, and second regions of the first conductivity type. The width w of a plating film formed on a source electrode of the semiconductor device is greater than or equal to 10 m. Beneath the plating film, the wide-bandgap semiconductor layer is formed on the surface of one of the semiconductor regions of the second conductivity type.

A gate pad electrode and a source electrode are disposed, separately from one another, on the front surface of a super junction semiconductor substrate. A MOS gate structure formed of n source regions, p channel regions, p contact regions, a gate oxide film, and polysilicon gate electrodes is formed immediately below the source electrode. The p well regions are formed immediately below the gate pad electrode. The p channel regions are linked to the p well regions via extension portions. By making the width of the p well regions wider than the width of the p channel regions, it is possible to reduce a voltage drop caused by a reverse recovery current generated in a reverse recovery process of a body diode. Breakdown of a portion of a gate insulating film immediately below the center of the gate pad electrode and breakdown of the semiconductor device are thus prevented

A semiconductor device includes a semiconductor chip formed with an SiC-IGBT including an SiC semiconductor layer, a first conductive-type collector region formed such that the collector region is exposed on a second surface of the SiC semiconductor layer, a second conductive-type base region formed such that the base region contacts the collector region, a first conductive-type channel region formed such that the channel region contacts the base region, a second conductive-type emitter region formed such that the emitter region contacts the channel region to define a portion of a first surface of the SiC semiconductor layer, a collector electrode connected to the collector region, and an emitter electrode connected to the emitter region. A MOSFET of the device is connected in parallel to the SiC-IGBT, and includes a second conductive-type source region electrically connected to the emitter electrode and a second conductive-type drain region electrically connected to the collector electrode.

At least some illustrative device embodiments include a highly-doped n-type semiconductor substrate having a first epitaxial layer of a lightly-doped n-type semiconductor; and a second epitaxial layer of a lightly-doped p-type semiconductor to form a vertical diode with the first epitaxial layer. A termination structure near the outer edges of the device includes a termination well in the second epitaxial layer, the termination well being a moderately-doped n-type semiconductor so as to form a horizontal diode with the second epitaxial layer. The structure further includes an electric field barrier. The electric field barrier includes at least one vertical trench extending through the termination well into the first epitaxial layer and exposing a sidewall region. The sidewall region is doped via the sidewalls to be a moderately-doped p-type semiconductor. Also provided are sidewall layers of a moderately-doped n-type semiconductor, the sidewalls electrically coupling the termination well to the substrate.

A semiconductor device includes MOSFET cells having a drift region of a first conductivity type. A first and second active area trench are in the drift region. A split gate uses the active trenches as field plates or includes planar gates between the active trenches including a MOS gate electrode (MOS gate) and a diode gate electrode (diode gate). A body region of the second conductivity type in the drift region abutts the active trenches. A source of the first conductivity type in the body region includes a first source portion proximate to the MOS gate and a second source portion proximate to the diode gate. A vertical drift region uses the drift region below the body region to provide a drain. A connector shorts the diode gate to the second source portion to provide an integrated channel diode. The MOS gate is electrically isolated from the first source portion.

To improve withstand capability of a semiconductor device during reverse recovery, provided is a semiconductor device including a semiconductor substrate having a first conduction type; a first region having a second conduction type that is formed in a front surface of the semiconductor substrate; a second region having a second conduction type that is formed adjacent to the first region in the front surface of the semiconductor substrate and has a higher concentration than the first region; a third region having a second conduction type that is formed adjacent to the second region in the front surface of the semiconductor substrate and has a higher concentration than the second region; an insulating film that covers a portion of the second region and the third region; and an electrode connected to the second region and the first region that are not covered by the insulating film.

A semiconductor device of an embodiment includes a first electrode, a second electrode facing the first electrode, an alternating-current electrode, a first switching element provided between the first electrode and the alternating-current electrode, and a second switching element provided between the second electrode and the alternating-current electrode. The first switching element and the second switching element are electrically connected in series between the first electrode and the second electrode, and the alternating-current electrode is electrically connected between the first switching element and the second switching element.