A semiconductor device includes a first terminal for a battery, a second terminal for an inverter circuit, and a transistor. The semiconductor device is configured to control a voltage applied to a control terminal of the transistor to allow supply of a current from the first terminal to the second terminal and allow supply of a current from the second terminal to the first terminal. A withstand voltage between the first terminal and the second terminal is greater than or equal to a voltage between the battery and the inverter circuit.

A microelectronic device includes a substrate, at least two doped well regions, an epitaxial structure, and at least two power elements. The doped well regions are disposed in the substrate, and are spaced apart from each other. Each of the doped well regions has a doping type opposite to that of the substrate. The epitaxial structure is disposed on the substrate, and is in contact with the doped well regions. The power elements are disposed on the epitaxial structure opposite to the substrate, and are cascade connected with each other. A low potential terminal of each of the power elements is electrically connected to a respective one of the doped well regions. A method for making the microelectronic device is also provided.

A semiconductor structure includes at least a first chip, the first chip comprising a semiconductor substrate and an active layer formed on an upper surface of the substrate, one or more lateral metal-oxide semiconductor devices being formed in the active layer of the first chip. The semiconductor structure further includes at least a first integrated capacitor disposed on a back-side of the semiconductor substrate of the first chip. The first integrated capacitor includes a first conductive layer in electrical connection with the back-side of the substrate, an insulating layer formed on at least a portion of an upper surface of the first conductive layer, and a second conductive layer formed on at least a portion of an upper surface of the insulating layer.

An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The ring resonator is over the substrate and overlaps with the transistor. The ring resonator includes a conductive loop and an impedance matching element. The conductive loop includes a loop portion having two first parts and a second part and two feeding lines. Each of the first parts of the loop portion is between the second part of the loop portion and one of the feeding lines, and a tunnel barrier of the transistor is closer to the second part than to the feeding lines. The impedance matching element is closer to the feeding lines than to the second part.

An electronic device includes a substrate, a transistor, and a ring resonator. The transistor is over the substrate. The ring resonator is over the substrate and includes a conductive loop and an impedance matching element. The conductive loop overlaps with the transistor. The impedance matching element is on the conductive loop and electrically isolated from the transistor.

An apparatus includes a first drain/source region and a second drain/source region surrounded by an isolation ring formed over a substrate, the isolation ring formed being configured to be floating, and a first diode connected between the substrate and the isolation ring, wherein the first diode is a Schottky diode.

A method of making an inverter comprising: a substrate; a first transistor in thermal contact with the substrate, wherein the transistor comprises a gate; the substrate sintered to a heat sink through a sintered layer; an encapsulant that at least partially encapsulates the first transistor; and a Kelvin connection to the transistor gate.

The present disclosure relates to semiconductor processing including epitaxial growth of a semiconductor material, and more particularly for some examples, to semiconductor processing integration for a bipolar junction transistor (BJT). In an example, a device includes a semiconductor substrate, a pedestal dielectric stack over the substrate, and a BJT on the substrate. The pedestal dielectric stack includes nitrogen at an interface between first and second sub-layers of the pedestal dielectric stack. An opening is through the pedestal dielectric stack to the substrate. The opening is defined at least in part by a retrograde sidewall, which is retrograde into the pedestal dielectric stack from distal from the substrate to proximate the substrate. At least a first portion of the BJT is on an upper surface of the substrate and in the opening through the pedestal dielectric stack. At least a second portion of the BJT is over the pedestal dielectric stack.