BSI image sensors and methods. In an embodiment, a substrate is provided having a sensor array and a periphery region and having a front side and a back side surface; a bottom anti-reflective coating (BARC) is formed over the back side to a first thickness, over the sensor array region and the periphery region; forming a first dielectric layer over the BARC; a metal shield is formed; selectively removing the metal shield from over the sensor array region; selectively removing the first dielectric layer from over the sensor array region, wherein a portion of the first thickness of the BARC is also removed and a remainder of the first thickness of the BARC remains during the process of selectively removing the first dielectric layer; forming a second dielectric layer over the remainder of the BARC and over the metal shield; and forming a passivation layer over the second dielectric layer.

Disclosed are minority carrier based mercury-cadmium telluride (HgCdTe) infrared detectors and arrays, and methods of making, are disclosed. The constructions provided by the invention enable the detectors to be used at higher temperatures, and/or be implemented on less expensive semiconductor substrates to lower manufacturing costs. An exemplary embodiment a substrate, a bottom contact layer disposed on the substrate, a first mercury-cadmium telluride layer having a first bandgap energy value disposed on the bottom contact layer, a second mercury-cadmium telluride layer having a second bandgap energy value that is greater than the first bandgap energy value disposed on the first mercury-cadmium telluride layer, and a collector layer disposed on the second mercury-cadmium telluride layer, wherein the first and second mercury-cadmium telluride layers are each doped with an n-type dopant.

In an embodiment a semiconductor detector includes a doped semiconductor body with a detection region, a front side and a rear side opposite the front side, a first electrical ring electrode and a second electrical ring electrode arranged around a read-out point on the front side, wherein the ring electrodes are configured to generate an electric field profile in the semiconductor body to guide free charge carriers to the read-out point, the ring electrodes overlapping at least partially with the detection region, as seen in plan view of the front side, a passivation layer arranged on the front side in a direction parallel to the front side between the first ring electrode and the second ring electrode and a first doped layer extending along the front side and electrically conductively connecting the first ring electrode to the second ring electrode without interruptions, wherein the first doped layer and a rest of the semiconductor body are oppositely doped to each other, and wherein a specific resistance of the first doped layer is between 1 cm and 1000 cm, inclusive.

The presently-disclosed subject matter relates generally to GaAs/GaAsSb core-shell nanowire grown on silicon substrate, methods of growing such nanowire, and the use of said nanowires in various applications, including but not limited to photodetection applications.

The present disclosure generally relates to single photon emission from an indirect band gap two-dimensional (2D) material through deterministic strain induced localization. At least some aspects of the present disclosure relate to techniques for deterministically creating spatially localized defect single photon emission sites in the 750 nm to 800 nm regime using a tungsten diselenide (WSe.sub.2) film and ultra-sharp SiO.sub.2 tips.

A semiconductor device has a layered structure. The semiconductor device includes a metallic layer of thickness 1-100 nm, with a thickness optimized to absorb light in a wavelength range of operation. The device further includes an adjacent semiconductor layer additionally adjacent to an ohmic electrical contact, wherein the interface between the metallic layer and the semiconductor layer is electrically rectifying and energy selective. The device further includes a reflective back surface positioned opposite to the semiconductor layer relative to incident light providing broadband reflection in the wavelength range of operation. The semiconductor layer includes a quantum well adjacent to the metallic layer, wherein the energy selectivity is provided by the quantum well allowing charge carrier tunneling from the metallic layer. The device further may include an additional anti-reflection dielectric layer deposited on the metallic layer that is configured to minimize reflection of light in the wavelength range of operation.

A manufacturing method of a sensing integrated circuit including the following acts. A plurality of transistors are formed. At least one dielectric layer is formed on or above the transistors. A plurality of connecting structures are formed in the dielectric layer. The connecting structures are respectively and electrically connected to the transistors. A plurality of separated conductive wells are respectively formed in electrical contact with the connecting structures.

MOSFET phototransistors, methods of operating the MOSFET phototransistors and methods of making the MOSFET phototransistors are provided. The phototransistors have a buried electrode configuration, which makes it possible to irradiate the entire surface areas of the radiation-receiving surfaces of the phototransistors.

An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.

A particle detector includes a support member. A front electrode layer is disposed over the support member. A semiconductor heterojunction is disposed over the front electrode layer. The semiconductor heterojunction has at least a polycrystalline n-type layer and at least a polycrystalline p-type layer. A back electrode layer is disposed over the semiconductor heterojunction. The back electrode includes at least one removed portion that separates a first portion of the back electrode layer from a second portion of the back electrode layer. The particle detector also includes a first body of electrically insulating material which separates a first portion of the semiconductor heterojunction from a second portion of the semiconductor heterojunction. The first body of electrically insulating material also separates a first portion of the front electrode layer from a second portion of the front electrode layer.