Patent classifications
H10F77/306
AVALANCHE INFRARED DETECTOR AND PREPARATION METHOD THEREOF
The present application relates to an avalanche infrared detector and a preparation method thereof. In the present application, a homogeneous structure is constructed based on an atomic layer number-dependent energy band structure of a two-dimensional van der Waals material, which can solve problems such as lattice mismatch and defects of the traditional heterojunction avalanche photodetectors and can inhibit the generation of main dark current components such as recombination current and tunneling current by detectors. A peak electric field at a stepwise homojunction interface is adopted to enhance a coulomb interaction between carriers, inhibit the hot carrier-phonon coupling, and reduce an energy loss caused by a relaxation process. The avalanche infrared detector provided by the present application can exhibit advantages such as high-speed response, high sensitivity, low avalanche threshold, and high gain under room-temperature working conditions, which expands an application range of the avalanche infrared detector.
PHOTONICS DEVICE WITH BACKSIDE TRANSMISSIVE REGION
Some implementations described herein provide techniques and apparatuses provide a semiconductor device including a photonics device having a backside transmissive region and methods of manufacturing. The semiconductor device includes a first semiconductor device stacked over a second semiconductor device, where the first semiconductor device includes a photodiode structure and the second semiconductor device includes the backside transmissive region. The backside transmissive region, which is below the photodiode structure of the first semiconductor device, includes a trench structure having highly reflective structures and/or properties to maintain an optical power of light waves propagating through the backside transmissive region. An absence of structures within the trench structure lessens a likelihood of interferences which may cause a transmission loss (e.g., a reflection loss, an absorption loss, a scattering loss, and/or a mode mismatch loss) relative to another transmissive region that is adjacent to the photodiode structure.
Solar cell and photovoltaic module
A solar cell, a manufacturing method thereof, and a photovoltaic module are provided. The solar cell includes a substrate having electrode regions and non-electrode regions that are alternatingly arranged in a first direction, where the non-electrode regions of the substrate include connection regions, first regions, and second regions; a dielectric layer formed over the electrode regions, the second regions, and the connection regions; a doped conductive layer formed over the dielectric layer; a passivation layer formed over the first regions and the doped conductive layer; and a plurality of electrodes.
Semiconductor device package
An embodiment provides a semiconductor device package, the semiconductor device package comprising: a substrate including an electrode disposed on one surface; a metal sidewall disposed on the substrate while surrounding the electrode; a semiconductor device disposed on the electrode; and a light transmitting member disposed on the metal sidewall to cover the semiconductor device, wherein the metal sidewall has the inner surface and the outer surface which are corrugated, and includes: a first metal part disposed on the substrate; a second metal part disposed on the first metal part; and a third metal part disposed on the second metal part, and the inner surface or the outer surface of the metal sidewall includes a recess portion between the second metal part and the third metal part.
LIGHT RECEIVING ELEMENT
A light receiving element includes a first semiconductor layer having a first conductivity type, a light absorbing layer stacked above the first semiconductor layer, a second semiconductor layer stacked above the light absorbing layer and having a second conductivity type, a first electrode electrically connected to the first semiconductor layer, a second electrode electrically connected to the second semiconductor layer, a first insulating film, and a light shielding film provided on or above the first insulating film. A light receiving region is formed at a portion overlapping the light absorbing layer, the first insulating film is configured to cover a periphery of the light receiving region, and the light shielding film is configured to cover the periphery of the light receiving region and has a light transmittance lower than a light transmittance of the first insulating film.
Semiconductor optical device
A semiconductor optical device includes a substrate a spot-size converter, an optical detector, a core layer and a first III-V compound semiconductor layer, the core layer is disposed between the substrate and the first III-V compound semiconductor layer, the optical detector includes a light absorbing layer, a second III-V compound semiconductor layer, and an insulating film, the light absorbing layer is disposed between the substrate and the second III-V compound semiconductor layer, the second III-V compound semiconductor layer is disposed between the light absorbing layer and the insulating film, the light absorbing layer is optically coupled to the core layer, the spot-size converter has a first end face connected to the optical detector and a second end face opposite to the first end face, and the first III-V compound semiconductor layer is connected to the second III-V compound semiconductor layer and the insulating film at the first end face.
SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
In order to regulate the characteristics of each of a plurality of individualized semiconductor elements, the present technique provides a semiconductor device including a first semiconductor element and a plurality of second semiconductor elements with a circuit configured to process a signal from the first semiconductor element, wherein the first semiconductor element and each of the plurality of second semiconductor elements are stacked and arranged; and a first film formed on at least one of the plurality of second semiconductor elements is different in configuration from a second film formed on another of the second semiconductor elements.
PASSIVE CAP FOR GERMANIUM-CONTAINING LAYER
In some embodiments, the present disclosure relates to a semiconductor device, including a substrate including a first semiconductor material and a semiconductor layer extending into an upper surface of the substrate and including a second semiconductor material with a different band gap than the first semiconductor material. The semiconductor device also includes a passive cap including a first dielectric material and disposed along the upper surface of the substrate and on opposite sides of the semiconductor layer, and a photodetector in the semiconductor layer. The first dielectric material includes silicon nitride.
AVALANCHE PHOTODIODES HAVING SEPARATE ABSORPTION CHARGE AND MULTIPLICATION (SACM) HETEROSTRUCTURES
Avalanche photodiode (APDs) including a separate absorption charge and multiplication (SACM) heterostructure are described herein. A device may include a substrate and a separate absorption charge and multiplication (SACM) heterostructure disposed on the substrate. The SACM heterostructure may include an absorber comprising gallium arsenide antimonide (GaAsSb) and a multiplier comprising aluminum gallium arsenide antimonide (AlGaAsSb). The device exhibits a gain (M) of greater than 50.
Surface uniformity control in pixel structures of image sensors
A semiconductor device with an image sensor and a method of fabricating the same are disclosed. The method includes depositing a dielectric layer on a substrate, forming a trench within the dielectric layer and the substrate, forming an epitaxial structure within the trench, and forming a barrier layer with first and second layer portions. The first layer portion is formed on a sidewall portion of the trench that is not covered by the epitaxial structure. The method further includes forming a capping layer on the epitaxial structure and adjacent to the barrier layer, selectively doping regions of the epitaxial structure and the capping layer, selectively forming a silicide layer on the doped regions, depositing an etch stop layer on the silicide layer, and forming conductive plugs on the silicide layer through the etch stop layer.