Provided is a semiconductor apparatus, wherein a doping concentration distribution in the buffer region has a deepest slope where a doping concentration monotonically decreases to a position where it comes in contact with the drift region in a direction from the lower surface of the semiconductor substrate toward an upper surface, a hydrogen chemical concentration distribution in the buffer region includes in a first depth range provided with the slope: a first decrease portion where a hydrogen chemical concentration decreases toward the upper surface side; a second decrease portion located closer to the upper surface side than the first decrease portion is and where the chemical concentration decreases; and an intermediate portion arranged between the first and second decrease portions, and the intermediate portion has: a flat portion where the distribution is uniform; a peak in a slope of the chemical concentration; or a kink portion of the chemical concentration.

Provided is a semiconductor device which includes a semiconductor substrate including a transistor portion and a diode portion. The transistor portion includes an injection suppression region that suppresses injection of a carrier of a second conductivity type at an end portion on the diode portion side in a top view of the semiconductor substrate. Both the transistor portion and the diode portion include a base region of a second conductivity type on a front surface of the semiconductor substrate, the transistor portion further includes an emitter region of a first conductivity type and an extraction region of a second conductivity type having a higher doping concentration than the base region on the front surface of the semiconductor substrate, and the injection suppression region is not provided with the emitter region and the extraction region.

A semiconductor device includes an insulator layer and a semiconductor layer formed on the insulator layer. The semiconductor layer includes a first region of a first conductivity type, a second region of a second conductivity type, and a lightly doped extension region of the first conductivity type separating the first region and the second region along a lateral x-axis. A dielectric structure laterally surrounds the semiconductor layer. At least one of the first region and the lightly doped extension region is formed at a distance to the dielectric structure along a lateral y-axis orthogonal to the x-axis. Along the x-axis and between the second region and the first region, a lateral extension of the semiconductor layer along the y-axis increases with increasing distance to the second region.

An electrostatic discharge (ESD) device may include a semiconductor substrate including a first region, a second region, and a device isolation structure. The first region may include a first impurity region having a first conductivity type, a second impurity region having a second conductivity type opposite the first conductivity type, a first base well, and a first well in the first base well. The device isolation structure may be between the first and second impurity regions. The first base well may surround the first impurity region, the second impurity region, and lower portions of the device isolation structure in the substrate. The first well may have the first conductivity type. The first well may be spaced apart from the device isolation structure in a first direction with a portion of the first base well therebetween.

Provided is a semiconductor device including a MOS gate structure provided in a semiconductor substrate, including: an interlayer dielectric film which includes a contact hole and is provided above the semiconductor substrate; a conductive first barrier metal layer provided on side walls of the interlayer dielectric film in the contact hole; a conductive second barrier metal layer stacked on the first barrier metal layer in the contact hole; and a silicide layer provided on an upper surface of the semiconductor substrate below the contact hole, in which the first barrier metal layer is more dense than the second barrier metal layer, and a film thickness thereof is 1 nm or more and 10 nm or less.

Provided is a semiconductor device comprising a semiconductor substrate which has an upper surface and a lower surface, and which is provided with a diode portion, wherein the diode portion includes a first cathode region of a first conductivity type, and a second cathode region of a second conductivity type, and the first cathode region and the second cathode region are provided alternately in a first direction, and a repetition pitch of the first cathode region and the second cathode region in the first direction is 40 m or more and 200 m or less, and an area ratio of the second cathode region relative to a sum of areas of the first cathode region and the second cathode region is 0.1 or more and 0.8 or less.

An apparatus and an associated method for a reverse-conducting insulated gate bipolar transistors and associated structures. The apparatus includes a substrate disposed between a frontside and a backside, a diode pilot region disposed in the substrate, an insulated gate bipolar transistor (IGBT) region disposed in the substrate, and a diode region with a barrier layer disposed adjacent to each of and between the diode pilot region and the IGBT region. The barrier layer is configured to prevent flow of electrons at a first predetermined current and allow flow of electrons at a second predetermined current.

A lateral silicon carbide power semiconductor device is disclosed. The device comprises a substrate and a silicon carbide semiconductor structure disposed on the substrate and having a principal surface. The semiconductor structure comprises a layer of first conductivity type disposed on the substrate, and a layer-shaped drift region of a second conductivity type, which is opposite to the first conductivity type, disposed directly on the layer so as to form an interface between the layer and the drift region. The drift region runs laterally along the principal surface between first and second ends. Doping in the drift region and the layer are arranged so as to deplete the drift region. The device comprises a first contact region to the drift region. The device comprises a second contact region to the second end of the drift region which is highly doped, which is of the first or second conductivity type which adjoins the second end of the drift region, is disposed in the drift region or in a region which adjoins the second end of the drift region The device comprises a highly-doped region of the first conductivity type extending into the semiconductor structure from the principal surface and adjoining the first end of the drift region, wherein the highly-doped region has a thickness greater than the drift region.

Provided is a semiconductor device provided with an IGBT, comprising: a semiconductor substrate having upper and lower surfaces, throughout which bulk donors are distributed; a hydrogen peak including a local maximum arranged 25 m or more away from the lower surface of the semiconductor substrate in a depth direction, at which a hydrogen chemical concentration shows a local maximum value; an upper tail where the hydrogen chemical concentration decreases in a direction from the local maximum toward the upper surface; and a lower tail where the hydrogen chemical concentration decreases in a direction from the local maximum toward the lower surface more gradually than the upper tail; and a first high concentration region having a donor concentration higher than a bulk donor concentration and including a region extending for 4 m or more in a direction from the local maximum of the hydrogen peak toward the upper surface.

A TVS device may include a substrate, comprising a polarity of a first type, a first dopant layer, disposed on a first main surface of the substrate, and comprising a polarity of a second type, wherein the first dopant layer forms a P/N junction with the substrate. The TVS device may further include a second dopant layer, disposed on a second main surface of the substrate, opposite the first main surface, the second layer comprising the polarity of the first type, and a patterned layer, disposed on the second main surface of the substrate, the patterned layer comprising the polarity of the second type, wherein the patterned layer is interspersed with the second layer.