Patent classifications
G06F9/45
SIMPLE OBFUSCATION OF TEXT DATA IN BINARY FILES
An obfuscation macro can expand obfuscation identification information into a data value during or prior to compiling source code, and insert a de-obfuscation call where the data value is referenced in the source code. An obfuscation utility can scan compiled binaries for data values containing obfuscation identification information. The obfuscation utility identifies and obfuscates data values containing obfuscation identification information within the compiled binaries. The de-obfuscation call de-obfuscates obfuscated data values during runtime.
PERFORMING REGISTER PROMOTION OPTIMIZATIONS IN A COMPUTER PROGRAM IN REGIONS WHERE MEMORY ALIASING MAY OCCUR AND EXECUTING THE COMPUTER PROGRAM ON PROCESSOR HARDWARE THAT DETECTS MEMORY ALIASING
Processor hardware detects when memory aliasing occurs, and assures proper operation of the code even in the presence of memory aliasing. Because the hardware can detect and correct for memory aliasing, this allows a compiler to make optimizations such as register promotion even in regions of the code where memory aliasing can occur. The compiled code is then executed on the processor hardware, which detects memory aliasing at run-time and assures proper operation of the code even when memory aliasing occurs.
SYSTEM AND METHOD FOR FACILITATING DYNAMIC REMAPPING OF ABSOLUTE ADDRESSES DURING SOFTWARE MIGRATION
A method includes receiving at least one source code file associated with a legacy hardware platform, the at least one source code file being part of a software migration from the legacy hardware platform to a target hardware platform. The method also includes identifying one or more absolute memory addresses of the legacy hardware platform included in the at least one source code file. The method further includes for each of the one or more absolute memory addresses, including an address remapping function in an assembly language instruction block associated with the target hardware platform.
COMPILER THAT PERFORMS REGISTER PROMOTION OPTIMIZATIONS IN REGIONS OF CODE WHERE MEMORY ALIASING MAY OCCUR
Processor hardware detects when memory aliasing occurs, and assures proper operation of the code even in the presence of memory aliasing. Because the hardware can detect and correct for memory aliasing, this allows a compiler to make optimizations such as register promotion even in regions of the code where memory aliasing can occur. The result is code that is more optimized and therefore runs faster.
PROCESSOR THAT DETECTS MEMORY ALIASING IN HARDWARE AND ASSURES CORRECT OPERATION WHEN MEMORY ALIASING OCCURS
Processor hardware detects when memory aliasing occurs, and assures proper operation of the code even in the presence of memory aliasing. Because the hardware can detect and correct for memory aliasing, this allows a compiler to make optimizations such as register promotion even in regions of the code where memory aliasing can occur. The result is code that is more optimized and therefore runs faster.
Prediction mechanism for subroutine returns in binary translation sub-systems of computers
A sequence of input language (IL) instructions of a guest system is converted, for example by binary translation, into a corresponding sequence of output language (OL) instructions of a host system, which executes the OL instructions. In order to determine the return address after any IL call to a subroutine at a target entry address P, the corresponding OL return address is stored in an array at a location determined by an index calculated as a function of P. After completion of execution of the OL translation of the IL subroutine, execution is transferred to the address stored in the array at the location where the OL return address was previously stored. A confirm instruction block is included in each OL call site to determine whether the transfer was to the correct or incorrect call site, and a back-up routine is included to handle the cases of incorrect call sites.
Single code set applications executing in a multiple platform system
Embodiments of the claimed subject matter are directed to methods and a system that allows an application comprising a single code set under the COBOL Programming Language to execute in multiple platforms on the same multi-platform system (such as a mainframe). In one embodiment, a single code set is pre-compiled to determine specific portions of the code set compatible with the host (or prospective) platform. Once the code set has been pre-compiled to determine compatible portions, those portions may be compiled and executed in the host platform. According to these embodiments, an application may be executed from a single code set that is compatible with multiple platforms, thereby potentially reducing the complexity of developing the application for multiple platforms.
Intelligent and automated code deployment
Exemplary method embodiments for deploying code in a computing sysplex environment are provided. In one embodiment, by way of example only, a system-wide trending mechanism is applied. At least one of an idle time and a low Central Processing Unit (CPU) utilization time of one system in the sysplex environment is matched with an estimated deployment time obtained from at least one of a latest measured period of time and a calculated time trend. A system-wide coordinating mechanism is applied. A staggered code deployment operation is recommended for at least one node of the system at an optimum system time generated from the matching.
Simulation apparatus, simulation method, and simulation program
A simulation apparatus includes a processor that executes a simulation of a control program executed on a controller. The controller controls motion of a machine that handles an object. The processor includes: a motion control device that controls motion of a virtual machine based on a motion command to move the virtual machine in a virtual space, with the virtual machine corresponding to the machine; a determination device that determines whether a volume of a region, where a work space in which the virtual machine works overlaps with the virtual object, is equal to or greater than a predetermined reference value, the virtual object being handled by the virtual machine and corresponding to the object; and a follow-up device that makes the virtual object follow the motion of the virtual machine based on the motion command when the volume is equal to or greater than the reference value.
Flexible acceleration of code execution
Technologies for performing flexible code acceleration on a computing device includes initializing an accelerator virtual device on the computing device. The computing device allocates memory-mapped input and output (I/O) for the accelerator virtual device and also allocates an accelerator virtual device context for a code to be accelerated. The computing device accesses a bytecode of the code to be accelerated and determines whether the bytecode is an operating system-dependent bytecode. If not, the computing device performs hardware acceleration of the bytecode via the memory-mapped I/O using an internal binary translation module. However, if the bytecode is operating system-dependent, the computing device performs software acceleration of the bytecode.