A semiconductor device includes a guardring including a first doped region and a first contact over the first doped region, a base including a second doped region and a second contact over the second doped region, a collector including a third doped region and a third contact over the third doped region, and an emitter including a fourth doped region and a fourth contact over the fourth doped region. The emitter, the collector, the base, and the guardring are separated on a backside of the semiconductor device via shallow trench isolation (STI) or floating gates.

A bipolar junction transistor includes an emitter region, a base region, a collector region and an isolation structure. The base region is disposed adjacent to a first side of the emitter region. The collector region is disposed adjacent to a second side of the emitter region. The isolation structure is disposed between the emitter region and each of the base region and the collector region.

A semiconductor device includes a base region having a first conductivity type, the base region extending into a top surface of a semiconductor layer, a collector region having an opposite second conductivity type, the collector region extending from the top surface into the semiconductor layer and spaced apart from the base region, and an emitter region having the second conductivity type, the emitter region extending from the top surface into the base region and having first and second faces along a junction between the emitter region and the base region.

A three-dimensional transistor includes a first transistor structure including a first lower source/drain (S/D) region and a first upper S/D region contacting the first lower S/D region at a first junction region, where the first upper S/D region has a first conductivity type, and where the first lower S/D region has a second conductivity type that is opposite to the first conductivity type. The three-dimensional transistor includes a second transistor structure including a second lower S/D region and a second upper S/D region contacting the second lower S/D region at a second junction region, where the second upper S/D region has the first conductivity type, and where the second lower S/D region has the second conductivity type. The three-dimensional transistor includes a first collector/emitter contact electrically connecting the first upper S/D region and the second upper S/D region.

A three-dimensional transistor includes a first transistor structure including a first lower source/drain (S/D) region and a first upper S/D region contacting the first lower S/D region at a first junction region, where the first upper S/D region has a first conductivity type, and where the first lower S/D region has a second conductivity type that is opposite to the first conductivity type. The three-dimensional transistor includes a second transistor structure including a second lower S/D region and a second upper S/D region contacting the second lower S/D region at a second junction region, where the second upper S/D region has the first conductivity type, and where the second lower S/D region has the second conductivity type. The three-dimensional transistor includes a first collector/emitter contact electrically connecting the first upper S/D region and the second upper S/D region.

A semiconductor device includes a first semiconductor material which, in turn, includes a bipolar junction transistor (BJT); and a second semiconductor material on the first semiconductor material. The second semiconductor material includes a field-effect transistor (FET). The BJT and FET are coupled to one another such that the drain current of the FET is boosted and supplied at the emitter terminal of the BJT.

The semiconductor device includes an n-type first semiconductor region 11, and an n-type common contact region 12 formed locally with a high impurity concentration on the first semiconductor region 11 and connected to a common electrode that serves as both a first main electrode of a switching element and a protection element side first electrode on the protection element side. A p-type second semiconductor region 13 and an n-type third semiconductor region 14 are provided in a switching element region R1. The p-type second semiconductor region 13 is formed in the first semiconductor region 11 at a location separated in the radial direction from the common contact region 12, and the n-type third semiconductor region 14 is formed in the second semiconductor region 13. A second main electrode is connected to the third semiconductor region 14. A p-type fourth semiconductor region 16 is provided in a protection element region R2. The p-type fourth semiconductor region 16 is formed in the first semiconductor region 11 at a location separated in the radial direction from the common contact region 12. A protection element side second electrode is connected to the fourth semiconductor region 16.

The semiconductor device includes an n-type first semiconductor region 11, and an n-type common contact region 12 formed locally with a high impurity concentration on the first semiconductor region 11 and connected to a common electrode that serves as both a first main electrode of a switching element and a protection element side first electrode on the protection element side. A p-type second semiconductor region 13 and an n-type third semiconductor region 14 are provided in a switching element region R1. The p-type second semiconductor region 13 is formed in the first semiconductor region 11 at a location separated in the radial direction from the common contact region 12, and the n-type third semiconductor region 14 is formed in the second semiconductor region 13. A second main electrode is connected to the third semiconductor region 14. A p-type fourth semiconductor region 16 is provided in a protection element region R2. The p-type fourth semiconductor region 16 is formed in the first semiconductor region 11 at a location separated in the radial direction from the common contact region 12. A protection element side second electrode is connected to the fourth semiconductor region 16.