Patent classifications
H10D86/0223
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.
METHOD OF MANUFACTURING THIN FILM TRANSISTOR, AND METHOD OF MANUFACTURING DISPLAY APPARATUS
A thin film transistor includes a polysilicon layer on a substrate, which includes a first area between second and third areas. A polysilicon layer is formed on the substrate, and a source electrode and a drain electrode are formed on the polysilicon layer in the first and third areas. Each of the source electrode and the drain electrode includes a metal silicide layer adjacent the polysilicon layer.
Method of localized annealing of semi-conducting elements using a reflective area
A method of making crystal semi-conducting material-based elements, including providing a support having amorphous semi-conducting material-based semi-conducting elements, the support being further provided with one or more components and with a reflective protective area configured so as to reflect a light radiation in a given wavelength range, exposing the element(s) to a laser radiation emitting in the given wavelength range so as to recrystallize the elements, the reflective protective area being arranged on the support relative to the elements and to the components so as to reflect the laser radiation and protect the components from this radiation.
MANUFACTURE METHOD OF AMOLED BACK PLATE AND STRUCTURE THEREOF
An AMOLED back plate includes a substrate on which a buffer layer and a poly-silicon section are sequentially formed. A source and a drain are respectively formed of P-type heavy doped micro silicon on the poly-silicon section that have edges facing and spaced from each other to define a channel therebetween. A gate isolation layer is formed on the buffer layer, the source, the drain and the channel. A gate is formed on the gate isolation layer and has opposite edges that face in directions toward the edges of the source and the drain. The opposite edges of the gate are spaced from the edges of the source and the drain by predetermined spacing distance in horizontal directions so as to prevent the gate from overlapping the source and the drain.
LTPS TFT substrate structure and method of forming the same
A method of forming an LTPS TFT substrate includes: Step 1: providing a substrate (1) and depositing a buffer layer (2); Step 2: depositing an a-Si layer (3); Step 3: depositing and patterning a silicon oxide layer (4); Step 4: taking the silicon oxide layer (4) as a photomask and annealing the a-Si layer (3) with excimer laser, so that the a-Si layer crystalizes and turns into a poly-Si layer; Step 5: forming a first poly-Si region (31) and a second poly-Si region (32); Step 6: defining a heavily N-doped area and a lightly N-doped area on the first and second poly-Si regions (31) and (32), and forming an LDD area; Step 7: depositing and patterning a gate insulating layer (5); Step 8: forming a first gate (61) and a second gate (62); Step 9: forming via holes (70); and Step 10: forming a first source/drain (81) and a second source/drain (82).
Manufacture method of AMOLED back plate and structure thereof
The present invention provides a manufacture method of an AMOLED back plate and a structure thereof. The manufacture method of the AMOLED back plate is: sequentially deposing a buffer layer (2), an amorphous silicon layer (2) on a substrate (1), and crystallizing and converting the amorphous silicon layer to be a polysilicon layer, and patterning the polysilicon layer, and then deposing a P type heavy doped micro silicon layer (P+uc-Si), and implementing a photo process to define a position of a channel (40), and etching the P type heavy doped micro silicon layer (P+uc-Si) to form a source/a drain (41), and thereafter, sequentially forming a gate isolation layer (5), a gate (61), an interlayer insulation layer (7), a metal source/a metal drain (81), a flat layer (9), an anode (10), a pixel definition layer (11) and a photo spacer (12); the source/the drain (41) and the gate (61) do not overlap in the horizontal direction and are mutually spaced. The method can improve the electrical property of the drive TFT to make the conductive current higher, and the leakage current lower, and diminish the image sticking for raising the display quality of the AMOLED.
THIN FILM TRANSISTOR, METHOD OF MANUFACTURING THE SAME, AND ORGANIC LIGHT-EMITTING DISPLAY
A thin film transistor array substrate comprises a substrate including a driving transistor region and a switching transistor region, an additional layer disposed in the driving transistor region on the substrate, a buffer layer disposed on the substrate to cover the additional layer, and a driving transistor and a switching transistor disposed in the driving transistor region and the switching transistor region, respectively, on the buffer layer.
Method of manufacturing display device
A method of manufacturing a display device including forming a polysilicon layer on a substrate, patterning the polysilicon layer to form a polysilicon pattern including a first region and a second region each having a first thickness, and a third region having a second thickness less than the first thickness, forming a gate insulation layer on the polysilicon pattern, forming a gate electrode on the gate insulation layer, partially implanting ions into the polysilicon pattern to form an active layer, forming an insulation interlayer on the gate electrode, forming source and drain contact holes each passing through the insulation interlayer and the gate insulation layer and respectively overlapping the first region and the second region, forming source and drain electrodes respectively filling the source and drain contact holes, and forming a light emitting element electrically connected to the source electrode or the drain electrode.
DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
A display apparatus includes a substrate, a gate electrode overlapping the substrate, and a semiconductor layer positioned between the substrate and the gate electrode. The semiconductor layer includes a first layer and a second layer positioned between the first layer and the gate electrode. A hydrogen content of the first layer is greater than a hydrogen content of the second layer.
Thin film transistor substrate, display apparatus, and method of manufacturing the thin film transistor substrate
Provided are a thin-film transistor substrate that has enhanced electrical characteristics, such as off-current characteristics of a thin-film transistor, without increasing the number of mask processes, a display apparatus, and a method of manufacturing the thin-film transistor substrate. The thin-film transistor substrate includes: a semiconductor layer including a first conductive region, a second conductive region, and a first semiconductor region; a lower electrode disposed on the semiconductor layer and at least partially overlapping the first semiconductor region; and an upper electrode disposed on the lower electrode and at least partially overlapping the first semiconductor region, a first boundary between the first semiconductor region and the first conductive region coincides with an edge of the upper electrode, and a second boundary between the first semiconductor region and the second conductive region coincides with an edge of the lower electrode or an edge of the upper electrode.