An imaging device of the present disclosure includes: a pixel array section in which pixels including light receiving elements are arranged; a first pixel control section that performs control to read out signals of all the pixels in the pixel array section at a first frame rate; a second pixel control section that performs control to read out signals of the pixels in a specific region in the pixel array section at a second frame rate higher than the first frame rate; and an analog-to-digital conversion section that performs an analog-to-digital conversion on a pixel signal read out by the control performed by the first pixel control section or the second pixel control section.

It is an object to extend event signal detection periods. An imaging device according to the present technology includes a solid-state imaging device including a plurality of pixels each including a light-receiving portion that photoelectrically converts incident light to generate an electrical signal and a detection circuit that executes event signal detection by comparing the amount of change in the electrical signal generated by the light-receiving portion with a predetermined threshold value to obtain a detection result, and a control unit that performs control so that different pixels have different timing for an event detection period to cause the detection circuit to execute the event signal detection.

In accordance with an embodiment of the present disclosure, an image synchronization device includes a light emitting source configured to emit light at intervals of a predetermined time, a sampling phase calibration circuit configured to calibrate a sampling phase of each of the first image sensor and the second image sensor on the basis of a light emitting timing of the light emitting source and a delay calibration circuit configured to generate delay information on the basis of a result of comparison between first image information transmitted from the first image sensor and second image information transmitted from the second image sensor.

An imaging device according to the present disclosure includes a plurality of pixel units each including a first pixel unit and a second pixel unit and a vertical signal line, in which each of the first pixel unit and the second pixel unit includes an amplification transistor, a selection transistor connected between the amplification transistor and the vertical signal line, and a connection unit that selectively connects between a common connection node of the amplification transistor and the selection transistor of the first pixel unit and a common connection node of the amplification transistor and the selection transistor of the second pixel unit.

An image sensor including: a pixel array disposed under a display panel, the pixel array including a plurality of pixels configured to perform a sensing operation by collecting a photo-charge generated by a light that penetrates the display panel; a row driver configured to drive the plurality of pixels row by row; and a controller configured to control the pixel array and the row driver such that a sensing sensitivity of blue pixels among the plurality of pixels is higher than a sensing sensitivity of red pixels and a sensing sensitivity of green pixels among the plurality of pixels.

A sensor device includes an array sensor having a plurality of detection elements arrayed in one or two dimensional manner, a signal processing unit configured to acquire a detection signal by the array sensor and perform signal processing, and a calculation unit. The calculation unit detects an object from the detection signal by the array sensor, and gives an instruction for making a frame rate of the detection signal from the array sensor variable on the basis of the detection of the object.

A camera agnostic core monitor for an enhanced flight vision system (EFVS) is disclosed. In embodiments, a structured light projector (SLP) generates and projects a precise geometric pattern or other like artifact, which is reflected by collimating elements into the EFVS optical path. Within the optical path, the EFVS focal plane array is illuminated by, and detects, the projected artifacts within the scene imagery captured for display by the EFVS. Image processors assess the presentation of the detected artifacts (e.g., position/orientation relative to the expected presentation of the detected artifact within the scene imagery) to verify that the displayed EFVS imagery is not misleading.

A removable optical attachment has an angular field-of-view-changing optic that simultaneously extends over an objective lens for a first camera and an objective lens for a second camera.

A silicon photomultiplier includes a plurality of microcells providing a pulse output in response to an incident radiation, each microcell including circuitry configured to enable and disable the pulse output. Each microcell includes a cell disable switch. The control logic circuit controls the cell disable switch and a self-test circuit. A microcell's pulse output is disabled when the cell disable switch is in a first state. A method for self-test calibration of microcells includes providing a test enable signal to the microcells, integrating dark current for a predetermined time period, comparing the integrated dark current to a predetermined threshold level, and providing a signal if above the predetermined threshold level.

A dual mode image sensor is provided. The image sensor includes an on-chip sensing array, on-chip analog-to-digital converters, and an on-chip processor. The sensor array has rows and columns of discrete sensor elements. The dual mode image sensor has a scene sensing mode and an image capture mode, which use the same set of imaging optics. The processor includes a dual context register; one being for the scene sensing mode and the other for image capture mode. The scene sensing mode is configured to output results of object sensing, motion detection, focus evaluation and illumination measurement to the analog-to-digital converters. The image capture mode is configured to output captured images to the analog-to-digital converters, which are configured to send the digital data to the processor. The processor is configured to switch from scene sensing mode to image capture mode based upon the scene sensing mode output results.