A method includes forming a first trench in a semiconductor body between two semiconductor fins, filling the first trench with a first filling material, partially removing the first filling material by forming a second trench such that the second trench has a lower aspect ratio than the first trench, and at least partially filling the second trench with a second filling material so as to form a continuous material layer on the first filling material. A semiconductor device includes a first trench in a semiconductor body between two semiconductor fins, the first trench being filled with a first filling material, and a second trench having a lower aspect ratio than the first trench and being at least partially filled with a second filling material which forms a continuous material layer on the first filling material.

A semiconductor device includes a plurality of compensation regions of a vertical electrical element arrangement, a plurality of drift regions of the vertical electrical element arrangement and a non-depletable doping region. The compensation regions of the plurality of compensation regions are arranged in a semiconductor substrate of the semiconductor device. Further, the plurality of drift regions of the vertical electrical element arrangement are arranged in the semiconductor substrate within a cell region of the semiconductor device. The plurality of drift regions and the plurality of compensation regions are arranged alternatingly in a lateral direction. The non-depletable doping region extends laterally from an edge of the cell region towards an edge of the semiconductor substrate. The non-depletable doping region has a doping non-depletable by voltages applied to the semiconductor device during blocking operation.

Provided is a semiconductor device including a gate trench portion and a first trench portion adjacent to the gate trench portion. The device may include a first conductivity type drift region provided in a semiconductor substrate, a second conductivity type base region provided above the drift region, a first conductivity type emitter region provided above the base region and having a doping concentration higher than that of the drift region, and a second conductivity type contact region provided above the base region and having a doping concentration higher than that of the base region. The contact region includes a first contact portion provided on a front surface of the substrate, and a second contact portion having a doping concentration different from that of the first contact portion and provided alternately with the first contact portion in a trench extending direction on a side wall of the first trench portion.

A semiconductor arrangement and method of manufacture is provided. In some embodiments, a semiconductor arrangement includes a collector region having a first surface coplanar with a first surface of a semiconductor layer, a drift region over a portion of the collector region and having a first surface coplanar with the first surface of the semiconductor layer, and a body region over the drift region. A body contact is in the body region. An emitter contact contacts the body contact and the body region. A collector contact contacts the first surface of the collector region. A first gate structure is adjacent the first surface of the drift region, the body region, and the body contact.

A semiconductor arrangement and method of manufacture is provided. In some embodiments, a semiconductor arrangement includes a collector region having a first surface coplanar with a first surface of a semiconductor layer, a drift region over a portion of the collector region and having a first surface coplanar with the first surface of the semiconductor layer, and a body region over the drift region. A body contact is in the body region. An emitter contact contacts the body contact and the body region. A collector contact contacts the first surface of the collector region. A first gate structure is adjacent the first surface of the drift region, the body region, and the body contact.